Local thinning of channel region for ultra-thin film SOI MOSFET

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257382, 257408, 257350, H01L 2701, H01L 2712, H01L 2976

Patent

active

055679668

ABSTRACT:
An elevated source/drain structure is described in which the channel region is thinned by local oxidation and wet etch while the source/drain region remained thick. This structure achieves source/drain resistances as small as 300 ohm-.mu.m for NMOS, which makes possible high drive currents in deep submicron thin-film SOI/MOSFET.

REFERENCES:
patent: 5124768 (1992-06-01), Mano et al.

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