Local scratchpad and data caching system

Details Local scratchpad and data caching system Local scratchpad and data caching system

2011-05-10

2011-05-10

Kim, Matt (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S129000, C711S130000, C711SE12001, C711SE12046

Reexamination Certificate

active

07941585

ABSTRACT:
A RISC-type processor includes a main register file and a data cache. The data cache can be partitioned to include a local memory, the size of which can be dynamically changed on a cache block basis while the processor is executing instructions that use the main register file. The local memory can emulate as an additional register file to the processor and can reside at a virtual address. The local memory can be further partitioned for prefetching data from a non-cacheable address to be stored/loaded into the main register file.

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