Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2004-12-06
2008-08-12
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07412682
ABSTRACT:
Some embodiments of the invention provide a method for routing. The method defines at least one wiring layer that has at least two regions with different local preferred wiring directions. The method then uses the differing local preferred wiring directions to define a global route on the wiring layer. The two regions are a first region with a first local preferred wiring direction, and a second region with a second local preferred wiring direction. The global route traverses the first region along the first local preferred wiring direction and traverses the second region along the second local preferred wiring direction.
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Frankle Jonathan
Hetzel Asmus
Jacques Etienne
Malhotra Anish
Adeli & Tollen LLP
Cadence Design Systems, Inc
Chiang Jack
Tat Binh
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