Local oxidation of silicon process

Details Local oxidation of silicon process Local oxidation of silicon process

1989-06-14

1990-03-20

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156653, 156657, 1566611, 156662, 437239, 437241, 437 61, H01L 21306, B44C 122, C03C 1500, C03C 2506

Patent

active

049098977

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention concerns improvements in or relating to processes which use local oxidation of silicon (LOCOS) to provide oxide isolation for silicon integrated circuit components.
Following the current demand for very large scale integration (VLSI) and therefore high packing densities, there is a need to scale down current feature sizes and thus to reduce the size and extent of isolating oxide structures.
The invention is intended to have application to processes for both bipolar and MOS device isolation.


BACKGROUND ART

Local oxidation of silicon (LOCOS) has been the standard method of isolation for large-scale integration (LSI) and very large-scale integration (VLSI) circuits for approximately ten years. See, for example Appls, J.A., et al., Philips Research Reports Vol.25 (1970) pages 118-132 and also United Kingdom Patent No: 1208574.
However, several features of the technique have since been identified as having a detrimental effect on the final device structure. The lateral encroachment of the oxide into the active area (bird's beaking) severely limits the scalability of the device and an attempt to reduce this by decreasing the thickness of the field region will cause an increase in interconnect capacitance.
The standard LOCOS isolation technique currently employed involves recessing a silicon surface to form a mesa, and thermally oxidising the exposed silicon surface in steam. The top of the mesa is typically protected from oxidation by a nitride cap which is deposited on a thin stress relief oxide, to ensure minimal defect generation during oxidation. The topography presented by the isolation oxide can cause problems with photolithography prior to metal deposition, where multiple angle reflections from the bird's beak produces a `necking` effect in subsequent metal depositions. Furthermore, the profile of the bird's head does not provide a suitable surface for metal coverage primarily due to a re-entrancy of the oxide at the bottom of the bird's head/field oxide region. The coupled effect of a large bird's head and a re-entrant step could present severe problems for metal continuity, where cracking or `mouse-holing` may be evident.
Recently, several isolation techniques have been investigated in an attempt to minimise bird's beak encroachment and produce an almost planar surface-- See for example Kuang, Yi, C., Moll, J. L., Manoliu, J., IEEE Trans. Electron Dev. vol. Ed-29, no. 4, April 1982; Teng, C., IEEE Trans. Electron Devices vol. Ed-32, no. 2, February 1985 and Hui, J., Voorde, P. V., Moll, J., IEDM 1985 p. 392. In general, these methods involve complex processing steps and are often accompanied by a high defect density during oxidation.


DISCLOSURE OF THE INVENTION

The present invention is intended to provide an alternative to the foregoing remedial processes, one that does not involve difficult processing operations. The aim of the inventive process, as disclosed below, is to provide a more ideal planar surface for subsequent metal coverage, this by reducing the step height of the bird's head/field oxide.
A further aim of the inventive process herein, is to suppress, or at least reduce, bird's beak encroachment, allowing thus more optimal use of the active areas enclosed within the boundaries of the field oxide isolation structure.
In accordance with the invention thus there is provided a local oxidation of silicon process, a process of the type wherein a capped single crystal silicon mesa is defined in a silicon substrate and thereafter an isolating structure of local field oxide is grown by thermal oxidation of the silicon; characterised in that: a layer of passive oxide is deposited upon the surfaces of the mesa cap, the mesa sidewall, and the silicon substrate prior to said thermal oxidation; thermal oxidation is performed in the presence of this layer; and, excess oxide removed thereafter by etching.
The inventive process disclosed here, addresses the problem of surface re-entrancy and bird's head height from two standpoints. Firstly, the deposited layer of

REFERENCES:
patent: 4333965 (1982-06-01), Chow et al.
patent: 4398992 (1983-08-01), Fang et al.
patent: 4637128 (1987-01-01), Mizutani

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