Local memory management system with plural processors

Details Local memory management system with plural processors Local memory management system with plural processors

2008-04-08

2008-04-08

Choi, Woo H. (Department: 2189)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S147000, C709S212000, C709S216000

Reexamination Certificate

active

10808320

ABSTRACT:
An information processing system includes a first processor having a first local memory, a second processor having a second local memory, and a third processor having a third local memory. The system further includes a unit which maps one of the second and third local memories in part of an effective address space of a first thread to be executed by the first processor. The mapped one of the second and third local memories is the local memory of a corresponding one of the second and third processors, which executes a second thread interacting with the first thread. The system also includes a unit that changes a local memory to be mapped in part of the effective address space of the first thread from the one of the second and third local memories to the other.

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