Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-01-28
2000-11-21
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438655, 257382, 257384, 257754, 257757, H01L 2144
Patent
active
061502669
ABSTRACT:
A local interconnect structure that includes a silicon spacer. After deposition of polysilicon gates and formation of spacers on a semiconductor substrate, photolithography and oxide etch steps are performed to remove a portion of a spacer along a segment of the gate where local interconnection is to be formed. A thin screen oxide layer is deposited over the wafer, followed by the formation of diffusion regions. A silicon layer (either amorphous or polycrystalline) is then deposited. The silicon layer is then selectively etched so as to form a silicon spacer along the segment of the gate where local interconnection is to be formed. A conventional SALICIDE process is performed, leading to simultaneous silicidation of the diffusion region, the gate, and the silicon spacer. The resulting local interconnect electrically connects the gate and the diffusion region.
de Muizon Emmanuel
Lin Xi-Wei
Monin, Jr. Donald L.
Peralta Ginette
VLSI Technology Inc.
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