Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-05-09
2006-05-09
Myers, Paul R. (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S311000, C710S306000
Reexamination Certificate
active
07043594
ABSTRACT:
In a serial bus network, an environment is provided, in which the serial bus is divided to two local buses and a specific terminal connected to one of the local buses can reliably occupy other terminals connected to the other local bus without influence on the terminals connected to the local buses. A specific terminal is connected to a local bus101, to which an inner portal3is connected, and an ID information thereof is preliminarily recorded in a ROM8. After a power source is turned on, the specific terminal connected to the side of the inner portal3is detected according to the ID information from the ROM8. An ID information of all of nodes connected to a local bus104, to which an outer portal4is connected, is read out and stored in a control portion5. A bus reset is generated on the local bus101. In order to give a connection information of the local bus104, a self-ID packet is generated by the control portion5and transmits it through a dedicated PHY6.
REFERENCES:
patent: 5848249 (1998-12-01), Garbus et al.
patent: 6131119 (2000-10-01), Fukui
patent: 6141767 (2000-10-01), Hu et al.
patent: 6219697 (2001-04-01), Lawande et al.
patent: 6378000 (2002-04-01), Akatsu et al.
patent: 6389496 (2002-05-01), Matsuda
patent: 6480889 (2002-11-01), Saito et al.
patent: 6496862 (2002-12-01), Akatsu et al.
patent: 6523064 (2003-02-01), Akatsu et al.
patent: 6539450 (2003-03-01), James et al.
patent: 6633547 (2003-10-01), Akatsu et al.
patent: 6751697 (2004-06-01), Shima et al.
patent: 6754184 (2004-06-01), Miyano et al.
patent: 2001/0023452 (2001-09-01), Spalink et al.
patent: 2001/0043731 (2001-11-01), Ito et al.
patent: 2002/0059179 (2002-05-01), Sato et al.
patent: 2002/0085505 (2002-07-01), Suda
patent: 933900 (1999-08-01), None
patent: 1085706 (2001-03-01), None
patent: 1175044 (2002-01-01), None
patent: 1089497 (2004-12-01), None
patent: 11-220485 (1999-08-01), None
patent: 2001-103085 (2001-04-01), None
IEEE Standards Board; “P1394.1 Draft Standard for High Performance Serial Bus Bridges”; IEEE Standards Board; Draft 0.02; Mar. 13, 1997; all pages.
IEEE Standards Board; “IEEE Standard for a High Performance Serial Bus”; IEEE Standards Board; IEEE Std 1394-1995; Jul. 22, 1996; various pages.
Fukushima Kengo
Kochii Hideki
Takeshita Tetsuya
Foley & Lardner LLP
Myers Paul R.
NEC Engineering Ltd.
Stiglic Ryan
LandOfFree
Local bus bridge does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Local bus bridge, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Local bus bridge will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3524431