Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1995-04-12
1999-03-23
Lall, Parshotam S.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395394, 395410, 711136, G06F 938
Patent
active
058871527
ABSTRACT:
A superscalar microprocessor is provided having a load/store unit which receives a pair of pointers identifying the oldest outstanding instructions which are not in condition for retirement. The load/store unit compares these pointers with the reorder buffer tags of load instructions that miss the data cache and store instructions. A match must be found before the associated instruction accesses the data cache and the main memory system. The pointer-compare mechanism provides an ordering mechanism for load instructions that miss the data cache and store instructions.
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Advanced Micro Devices , Inc.
Kivlin B. Noel
Lall Parshotam S.
Merkel Lawrence J.
Patel Gautam R.
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