Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1997-05-19
1998-09-01
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
711118, 711144, G06F 1200
Patent
active
058025880
ABSTRACT:
A load/store buffer is provided which allows both load memory operations and store memory operations to be stored within it. Memory operations are selected from the load/store buffer for access to the data cache, including cases where the memory operation selected is subsequent in program order to a memory operation which is known to miss the data cache and is stored in the buffer. In this way, other memory operations that may be waiting for an opportunity to access the data cache may make such accesses, while the memory operations that have missed await an opportunity to make a main memory request. Memory operations that have missed are indicated by a miss bit being set, so that the mechanism which selects memory operations to access the data cache may ignore them until they become non-speculative.
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Chinnakonda Muralidharan S.
Hattangadi Rajiv M.
Ramagopal H. S.
Advanced Micro Devices , Inc.
King , Jr. Conley B.
Kivlin B. Noel
Swann Tod R.
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