Load resistor with dummy contact substantially free of...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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Details

C257S363000, C257S380000, C257S489000

Reexamination Certificate

active

07084478

ABSTRACT:
A semiconductor device with a load resistor is manufactured such that a contact is formed at both ends of the load resistor, and at least one contact is formed between the contacts, in order to prevent impurities from being generated within each contact while the contacts are being generated by etching an insulation layer phenomena of electric charge build up from occurring when an etching process fabricates an insulation layer to generate the contact in a long load resistor located under the insulation layer and insulated electrically and physically.

REFERENCES:
patent: 3971061 (1976-07-01), Matsushita et al.
patent: 3996551 (1976-12-01), Croson
patent: 4146882 (1979-03-01), Hoff, Jr. et al.
patent: 4757368 (1988-07-01), Masunaga et al.
patent: 5242225 (1993-09-01), Kasanami et al.
patent: 6201286 (2001-03-01), Nagasaka
patent: 6269695 (2001-08-01), Cesternino et al.
patent: 6294872 (2001-09-01), Tsuruoka et al.
patent: 6458670 (2002-10-01), Nagasaka

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