Load capacitance compensated buffer, apparatus and method...

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S086000, C326S087000, C326S027000, C326S026000

Reexamination Certificate

active

06313664

ABSTRACT:

BACKGROUND
1. Field of the Invention
The present invention relates generally to output buffers, and more specifically to load capacitance compensating output buffers.
2. Description of the Related Art
It is known in the semiconductor industry to limit the transient effects of signals by controlling the slew rates of these signals. Slew rates for an unregulated buffer will vary based upon load capacitance. Load dependence of slew rate can be controlled by using a feedback path from the driver output to control the input of the driver and by using layout techniques such as snaked gates. Transient effects, such as transmission line effect reflections, cross talk between nodes, and overshoot/ringing, are reduced by using feedback to control the slew rate of individual output nodes.
For example, slew rates may be controlled by connecting a capacitor between a controlling voltage and an output signal of an output stage. The capacitor is used to provide feedback which is necessary to moderate the output transient. One disadvantage associated with an output stage of this type of circuit is that large capacitors are required to drive an output pull-up and/or pull-down gate while overcoming the drive current of the pre-driver. In order to assure that the drive current of the pre-driver can be balanced in a manner that is immune or resistant to process variations, a series precision resistor which typically requires special processing can be used.
Another slew rate control implementation uses switched differential amplifiers to compare the output signal to a signal generated by a transistor pulling one terminal of a reference capacitor. Such an implementation utilizes a single driver having its output based upon the relationship of the output signal of the driver and the signal associated with the reference capacitor. Because one leg of the amplifier from each differential pair will directly drive a final output transistor of a pull-up or pull-down driver, large switched amplifiers are often needed. Such large switched amplifiers have the disadvantage of low speed.
Conventional slew rate controllers respond to a signal transition at a predetermined value of the time derivative of voltage (dV/dt) and act to limit dV/dt thereafter. However, while such slew rate controllers typically affect the slew rate by controlling dV/dt, such slew rate controllers do little to directly control the time derivative of current (dI/dt). Typically, the initial component of dI/dt waveforms for different loads are substantially identical and take the form of a pulse which has already occurred by the time conventional slew rate controllers respond to dV/dt. Thus, although dV/dt is controlled by conventional solutions, the initial pulse in dI/dt is substantially unaffected because the increase in dI/dt precedes the increase in the magnitude of dV/dt.
The similarity of the initial dI/dt components indicates that they are substantially independent of the loading, unlike dV/dt which is load dependent. During a signal transition at a buffer, a dV/dt waveform for a relatively large load (e.g., 30 pF in one embodiment) will typically vary smoothly from zero V/S to a maximum magnitude and back to zero, whereas a dV/dt waveform for a relatively small load (e.g., 5 pF in one embodiment) will typically increase in magnitude more sharply because of the smaller capacitance. In contrast, the initial dI/dt is chiefly a function of the current drive of the output transistor and the rate at which the controlling voltage of the output transistor crosses the turn-on threshold. The dI/dt during a signal transition for each of a set of conventional drivers on an integrated circuit typically peaks at substantially the same instant in time and is of a magnitude that is substantially load independent. Thus, when a number of drivers are switched simultaneously, the total initial dI/dt generated is the sum of the initial dI/dt for each of the drivers. This total dI/dt is often the key factor responsible for electromagnetic interference (EMI) and other undesirable transient effects.
Other disadvantages of the prior art include the need for special processes to fabricate the drivers in semiconductors. For example, depending upon the transistor sizes needed, double poly processes, or processes capable of providing precision resistors are preferable.
Therefore, it would be beneficial to have a load capacitance output buffer that controls dV/dt and dI/dt in a baseline process.


REFERENCES:
patent: 5619147 (1997-04-01), Hunley
patent: 5909402 (1999-06-01), Joo
patent: 5949259 (1999-09-01), Garcia
patent: 5986489 (1999-11-01), Raza et al.
patent: 6118324 (2000-09-01), Li et al.
patent: 6181156 (2001-01-01), Durham et al.
patent: 6184703 (2001-02-01), Vest et al.

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