Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2008-04-22
2008-04-22
Mclean, Kimberly (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S100000, C711S004000, C711S111000, C711S112000, C718S105000
Reexamination Certificate
active
07363451
ABSTRACT:
System and methods are disclosed for load balancing Input/Output (IO) commands to be executed by one or more disk drives from an array of disk drives. Systems and methods disclosed herein use one or more properties, such as disk drive RPM, disk drive cache, command queue lengths, real-time drive data, and head position to provide load balancing of Input/Output commands.
REFERENCES:
patent: 2006/0212873 (2006-09-01), Takahisa
patent: 2006/0288184 (2006-12-01), Riska et al.
Doelfel Hardy
Kolli Neela Syam
Saxena Ajitabh Prakash
LSI Logic Corporation
McLean Kimberly
North Weber & Baugh
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