Lithography suspect spot location and scoring system

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

07823099

ABSTRACT:
A fast method to detect hot spots using foundry independent models that do not require RET/OPC synthesis is presented. In some embodiments of the present invention, sensitive spots are located. Lithography models are used to simulate the geometry near the sensitive spots to produce a model of the area around the sensitive spots. The sensitive spots are scored using a measure such as intensity (of light) or scoring based on contrast.

REFERENCES:
patent: 7448012 (2008-11-01), Qian
patent: 2005/0132322 (2005-06-01), Inoue
patent: 2007/0044049 (2007-02-01), Adams et al.
patent: 2007/0266362 (2007-11-01), Lai et al.
patent: 2008/0295046 (2008-11-01), Su et al.

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