Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2011-01-11
2011-01-11
Lin, Sun J (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07870532
ABSTRACT:
A lithography simulation method of obtaining a resist image by a simulation using a first function and a second function, the lithography simulation method comprising: determining a mask transmission function from a mask layout, modulating the mask transmission function using the first function to determine a modulated mask transmission function, obtaining an optical image of the mask layout using the modulated mask transmission function, and applying the second function to the optical image to obtain the resist image of the mask layout.
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Adam; “Modeling Electromagnetic Effects From Mask Topography At Full-Chip Scale”, Proceedings of SPIE, vol. 5754, pp. 498-505, (2005).
Erdmann et al.; “Mask and Wafer Topography Effects in Immersion Lithography”, Proceedings of SPIE, vol. 5754, pp. 383-395, (2005).
Bai et al.; “Approximation of Three Dimensional Mask Effects With Two Dimensional Features”, Proceedings of SPIE, vol. 5751, pp. 446-455, (2005).
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Lin Sun J
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