Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2000-04-18
2002-07-02
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C250S492220
Reexamination Certificate
active
06415432
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a lithography pattern data generation method, a patterning method and a charged particle lithography system for use in drawing design patterns onto a substrate to be patterned by using an exposure beam of charged particles in fabrication of a semiconductor device, a liquid crystal display device or a thin film magnetic head device.
In the photolithography technique currently used for fabricating semiconductor devices, a bright line of a mercury lamp (i-line) of a wavelength of 365 nm or a KrF excimer laser beam of a wavelength of 248 nm is used as a light source. Furthermore, an ArF excimer laser beam of a wavelength of 193 nm is to be used as the light source of the next generation. However, f or further refinement of devices, there are limits in the photolithography. Therefore, a variety of lithography techniques have been proposed, among which lithography using charged particles, in particular, an electron beam is attracting attention.
Now, a lithography method using a conventional electron beam lithography system will be described with reference to a drawing.
FIG. 18
is a schematic diagram of an electron optical lens barrel of the conventional electron beam lithography system. As is shown in
FIG. 18
, above awafer
202
supported on the top surface of a movable stage
201
is disposed an electron gun
204
for emitting an electron beam
203
to the wafer
202
. Between the movable stage
201
and the electron gun
204
, a first aperture
205
having a first opening
205
a
in a square shape, a selective deflection device
206
for selectively deflecting the electron beam
203
having passed through the first opening
205
a
, a second aperture
207
having a second opening
207
a
in a square shape, and a reducing lens
208
for reducing an exposure beam with a square section, that is, the electron beam having passed through the second opening
207
a
, are successively disposed in this order in the direction from the electron gun
204
toward the movable stage
201
.
On the inside of the reducing lens
208
, a primary deflection device
209
A for deflecting the exposure beam is disposed, and on the inside of the primary deflection device
209
A, a secondary deflection device
209
B is disposed in an upper portion and a tertiary deflection device
209
C is disposed in a lower portion.
The lithography system having the aforementioned structure is operated as follows:
First, the electron beam
203
emitted from the electron gun
204
supplied with an acceleration voltage of approximately 50 kV is shaped, by the first opening
205
a
, to have a square section in a perpendicular direction to the proceeding direction of the electron beam
203
. The shaped electron beam
203
is deflected by the selective deflection device
206
before reaching the second opening
207
a
, so that the electron beam
203
having passed through the second opening
207
a
can be shaped to have a desired square section, for example, a rectangular section.
Next, the electron beam
203
having been shaped into a desired square shape is allowed to irradiate a predetermined area on the wafer
202
by the deflection devices
209
A,
209
B and
209
C. Thus, exposed patterns corresponding to design data are successively drawn.
The primary deflection device
209
A has a deflection area in a rectangular shape of approximately 3 mm by 5 mm at most. In general, a pattern to be drawn is sufficiently larger than the deflection area. Therefore, in exposure using an electron beam, a pattern formation area is divided into partial exposure areas each in the shape of a stripe with a width corresponding to or smaller than the maximum deflectable width, and the patterns are drawn in each of the divided partial exposure areas. Accordingly, a pattern data extending over plural partial exposure areas is divided into design data of each partial exposure area to be stored in a data storage unit of the system.
FIG. 19
shows an example of the conventional lithography pattern data generation method by dividing the lithography pattern data into the stripe areas. As is shown in
FIG. 19
, lithography pattern data
211
through
216
are arranged on a data arranging area
210
, which is divided into first through third stripe areas
221
,
222
and
223
each with a width of 5 mm. The lithography pattern data
211
and
212
fall within the first stripe area
221
, and the lithography pattern data
213
extends over the first stripe area
221
and the second stripe area
222
. Similarly, the lithography pattern data
214
extends over the second stripe area
222
and the third stripe area
223
. Accordingly, for example, the lithography pattern data
213
is generated dividedly between the first stripe area
221
and the second stripe area
222
.
The conventional lithography pattern data generation method, however, have the following problems: Since exposure is conducted by deflecting the electron beam in each of the stripe areas
221
,
222
and
223
as is shown in
FIG. 19
, the positional accuracy of the exposed patterns is sufficiently high within each stripe area. In contrast, since the movable stage
201
supporting the wafer
202
shown in
FIG. 18
is moved between adjacent stripe areas, there arises a connection error in an exposed pattern extending over the adjacent stripe areas. Accordingly, as is shown in FIG.
20
(
a
), a first partial exposure area
221
A corresponding to the first stripe area
221
can be away from a second partial exposure area
222
A corresponding to the second stripe area
222
, or the second partial exposure area
222
A can overlap a third pattern exposure area
223
A corresponding to the third stripe area
223
.
Such a connection error derives from insufficient accuracy in positioning the movable stage
201
or insufficient stability of the electron beam output. Such a connection error leads to the following defects: In the lithography pattern data
213
and
214
extending over the adjacent partial exposure areas, when the adjacent pattern exposure areas are away from each other, disconnection can be caused, for example, in a negative resist, as is shown as a first defective pattern
217
A of FIG.
20
(
b
), or when the adjacent pattern exposure areas are slightly away from each other, a line width failure where the line width is locally reduced can be caused as is shown as a second defective pattern
217
B of FIG.
20
(
b
). Alternatively, when the partial exposure areas overlap each other, a third defective pattern
217
C where the line width is locally increased can be caused. In any case, such defects lead to a failure in a circuit pattern, which can degrade the yield of devices.
SUMMARY OF THE INVENTION
In view of the aforementioned conventional problems, an object of the invention is forming a resist pattern in a desired shape by preventing deformation of the resist pattern derived from a connection error between adjacent partial exposure areas in using a charged particle beam.
In order to achieve the object, in generation of lithography pattern data from design data according to the invention, plural design data are arranged in a data arranging area corresponding to a design pattern formation area, and the data arranging area is divided into plural partial exposure areas. From plural design data on the divided data arranging area, design data extending over two or more partial exposure areas are extracted, and the data arranging area is divided again so that at least one of the extracted design data can fall within one partial exposure area, or the extracted design data are subjected to multiple exposure.
Specifically, the first lithography pattern data generation method of this invention for generating, from plural design data corresponding to design patterns, lithography pattern data to be drawn correspondingly to the design patterns on a substrate by using an exposure beam of charged particles, comprises an area dividing step of dividing a predetermined area where the plural design data are arranged, which corresponds to
Saito Takashi
Watanabe Hisashi
Garbowski Leigh Marie
Matsushita Electric - Industrial Co., Ltd.
Nixon & Peabody LLP
Robinson Eric J.
Smith Matthew
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