Lithography and etching process

Details Lithography and etching process Lithography and etching process

2000-07-22

2002-05-14

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S585000, C430S313000

Reexamination Certificate

active

06387785

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a fabrication process for semiconductors. More particularly, the present invention relates to lithography and etching process using a bottom anti-reflection coating (BARC) and a hard mask.
2. Description of the Related Art
The lithography and etching process is very important for the manufacturing of semiconductors. The purpose of the lithography process is to form a patterned photoresist layer over the material layer to be patterned, and that of the etching process is to etch the exposed material layer using the patterned photoresist layer as a mask to obtain the patterned material layer. Since the photoresist layer is also being etched during the etching process, the thickness of the photoresist layer often increases as the requirement of the etching process increases to prevent the part of the material layer to be remained from being damaged during the etching process.
However, the resolution of the lithography and etching process decreases as the thickness of the photoresist layer increases. The thickness of the photoresist layer is thus limited. A hard mask layer of an inorganic material, as a result, is often used to replace the photoresist layer during the etching process. Such a process is accomplished by forming a hard mask layer over the material layer to be patterned followed by forming a patterned photoresist layer over the hard mask layer. Subsequently, the exposed hard mask layer is removed by using the photoresist layer as a mask. The exposed material layer is further removed by using the patterned hard mask layer as a mask.
The conventional material for the hard mask layer is silicon oxide or silicon nitride. However, the absorbency of silicon oxide or silicon nitride to the deep ultra-violet (DUV) light, such as one having the wavelength of 193 nm or 248 nm, used in the current exposing process is low. A hard mask layer of silicon oxide or silicon nitride cannot effectively absorb the deep ultra-violet light during an exposure process. The intensity of the light reflected from the surface of the material layer followed by penetrating through the hard mask layer remains strong enough to interfere with the incident light that enters the photoresist. The intensity of the reflected light will oscillate periodically as the thickness of the hard mask layer varies. It could lead to great variation both in the width of the patterned photoresist layer after development and in the critical dimension (CD) of the patterned material layer after etching. When the thickness of the respective hard mask layer is not uniformed due to the uneven surface of the substrate, the inconsistent critical dimension of the patterned material layer further adversely affects the quality of the integrated circuit device.
Furthermore, when the silicon nitride layer or silicon oxide layer is used as a hard mask, the intensity of the reflected light would vary according to thickness variation of the hard mask layer. Accordingly, the thickness of the hard mask layer on the same chip or chips from a different batch must be strictly controlled to the vicinity of the peak of oscillation of the intensity of the reflected light. This can avoid the excess critical dimensional variation of the patterned material layer to adversely affect the quality and consistency of the product. The consideration and cost of the process will increase due to the strict control for the thickness of the hard masking layer.
SUMMARY OF THE INVENTION
The present invention provides a lithography and etching process applicable to a substrate, which can resolve the above problems in the art using a hard masking layer, such as the problem of an inaccurate critical dimension caused by the high intensity of the reflected light. The process of the present invention comprises the steps of forming a material layer to be patterned on the substrate, then forming a silicon oxynitride layer of at least 800 angstroms in thickness, which can absorb deep ultra-violet light, over the material layer to completely absorb the reflected light from the surface of the material layer. A patterned photoresist is subsequently formed over said silicon oxynitride layer, followed by removing the exposed silicon oxynitride layer using said photoresist as a mask, and removing the exposed material layer using the patterned silicon oxynitride layer as a mask to form a patterned material layer.
Furthermore, to consider the thickness variation of the film caused by the uneven substrate surface or deviation in the processing condition, the silicon oxynitride layer of the present invention preferably has a thickness of more than 1100 angstroms to ensure a complete absorption of the reflected light from the surface of the material layer. Additionally, because silicon oxynitride has a broad absorption range to the wavelength of the deep ultra-violet light, the process of the present invention is applicable to a lithography and etching process using an exposure light source of 193 nm or 248 nm in wavelength.
In the first embodiment of the present invention, it is exemplified by the manufacturing process of a silicon gate, for example, a polysilicon layer or non-crystalline silicon layer is used as the above material layer and the patterned material layer is the gate. Such process for producing a gate is applicable to the process for producing dynamic random access memory (DRAM) or static random access memory (SRAM).
In the second embodiment of the present invention, it is exemplified by the patterning of a metal layer, for example, the above material layer is a metal layer, and the patterned material is a conductive line or an electrode plate for a capacitor,.
In the third embodiment of the present invention, it is exemplified by the process for producing shallow trench isolation. In this case, the layer to be patterned is the substrate itself.
As mentioned in the above, since the thickness of the silicon oxynitride layer formed according to the present invention is more than 800 angstroms, it is used not only as the hard mask layer during the etching process, it is also used as the bottom anti-reflecting layer in the lithography process before the etching process, such that the resolution of the lithography process can be enhanced. Additionally, because the silicon oxynitride layer is more than 800 angstroms thick, the deep ultra-violet light reflected from the surface of the material layer can be absorbed completely by the silicon oxynitride layer. An inaccurate critical dimension caused by an uneven substrate surface or a non-uniform deposition can be prevented. Moreover, since the thickness of the silicon oxynitride layer is greater than 800 angstroms and is capable of completely absorbing the deep ultra-violet light reflected from the surface of the material layer, the thickness of the hard mask layer can be readily adjusted according to the demands of the etching process, without having to consider the issue of an inaccurate critical dimension caused by the thickness variation of the hard mask layer.
It is to be understood that both forgoing general description and the following detailed description are exemplary, and intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5872385 (1999-02-01), Taft et al.
patent: 6107172 (2000-08-01), Yang et al.
patent: 6156485 (2000-12-01), Tang et al.

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