Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-12-20
2005-12-20
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C708S008000, C708S142000, C326S040000
Reexamination Certificate
active
06978427
ABSTRACT:
A method and apparatus for implementing fast sum-of-products logic in a field programmable gate array (FPGA) is disclosed. The method includes literal-sharing decomposition of the sum-of-products logic to reduce the number of configurable logic block (CLB) slices required to implement wide fan-in logic functions on an FPGA. The decomposition is performed by combining product terms having similar literal patterns. The apparatus includes a CLB including a plurality of slices and a second-level logic (separate from the slices) circuit to combine the outputs of the slices. Typically, the second-level logic is an OR gate or its equivalent that implements the sum portion of the sum-of-products expression. Alternatively, a combining gate may be included within the slice to combine the output of the slice with the output of another slice preceding the first slice.
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“The Programmable Logic Data Book 1996”, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124; pp. 4-32 to 4-37.
Behiel Arthur J.
Do Thuan
Xilinx , Inc.
Young Edel M.
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