Liquid potting composition

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Reexamination Certificate

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C257S789000, C257S793000, C257S795000, C523S443000, C523S466000

Reexamination Certificate

active

06562482

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to a liquid potting composition, a semiconductor device manufactured using such composition and a process for manufacturing a semiconductor device using such composition.
BACKGROUND OF THE INVENTION
In recent years, numerous technological advances have occurred in respect to semiconductor packaging resulting in significant reductions in the size, weight and thickness of such packaging and several processes designed to bring about such reductions are now in commercial practice. An area mounting system which bonds the projecting electrodes of a semiconductor chip to a circuit board using solder has become quite important and has generally replaced existing lead frame connection technology.
One of the methods used to minimize semiconductor packaging size is a flip chip which contains projecting electrodes on the circuit side of a semiconductor. In the case of solder electrodes, flip chip packaging causes the connection of the electrodes to the circuit board by re-flow processes after a reflux process has been carried out in order to remove any oxide film from the electrode surfaces and the surface of the circuit board. As a result, flux residues remain on the electrode surfaces. Since the presence of such flux represents an impurity which could adversely affect the performance of the circuit board, it must be removed by cleaning the electrode surfaces and the surface of the circuit board by flux removal prior to application of any liquid potting composition. Such cleaning process is necessary since the circuit board connects directly to the projecting electrodes and reliability tests such as temperature cycle tests indicate electrical failures at the points of connection of the electrodes to the circuit board due to the differences in linear coefficients of expansion between the chip and the circuit board.
Typical potting techniques involve the coating of a liquid resin on the rim of a chip or on multiple surfaces and thereafter running the liquid resin between the circuit board and the chip by means of capillarity action. However, such method entails very high processing time due to the flux process and the cleaning process, as well as environmental problems resulting from the need to dispose of the spent cleaning liquid. Furthermore, the excessive time required for the potting process with the liquid resin using capillarity action significantly affects the production rate for the potted semiconductor.
U.S. Pat. No. 5,128,746 discloses a process wherein a resin is coated directly onto the surface of a circuit board, a chip having solder electrodes is placed on top of the coated circuit board, and the assembly is thereafter heated to simultaneously carry out resin potting and solder bonding. The unique feature disclosed in this patent is the addition of a component which imparts a flux function to the resin composition (which comprises a thermosetting resin and a hardener) to connect the solder to the circuit board However, the component which imparts the flux function to the resin composition is a carboxylic acid having a high degree of acidity. Such acid generates ionic impurities and the electrical conductivity of the hardened potting resin increases. In particular, the electrical insulation properties of the hardened resin composition are degraded due to hygroscopic effects created by the addition of such component to the resin composition.
It has been found that when a main component having the flux function is a monocarboxylic acid such as rosin and abietic acid, the component having the flux function is capable of reacting with the epoxy groups of the resin component because the acidity of the monocarboxylic acid with the flux function is high. However, the component having the flux function initiates hydrolysis and separates the acid in the hardened potting resin after exposure to high humidity conditions. As a result, the electrical conductivity of the hardened potting resin is degraded.
On the other hand, the hardeners employed in the liquid potting composition of the invention are incorporated in the cross-linking reaction during the hardening process and further, ether bonding prevents hydrolysis due to the absorption of moisture. Accordingly, the problems noted above with respect to prior art hardeners do not occur with the hardeners employed in the liquid potting compositions of the present invention since the carboxyl group is partially reacted with the epoxy group thereby preventing separation of the epoxy groups from the resin even if moisture absorption occurs. In order to control the degree of cross-linking, the liquid epoxy resin may be reacted in advance with the multi-hydroxy aromatic compound containing at least two hydroxyl groups and at least one carboxyl group described below and the reaction product thereof may be used as a hardener.
OBJECTS OF THE INVENTION
It is an object of the invention to prepare a liquid potting composition for use in an area mounting system for potting semiconductor chips, especially chips containing projecting electrodes on the circuit side, which will provide superior electrical insulation properties, short potting times and low levels of ionic impurities.
It is a further object of the invention to provide a process for manufacturing a semiconductor device wherein an area mounting system is used to connect a semiconductor chip containing projecting electrodes on a circuit side to a circuit board.
Such objects as well as further objects will be apparent from the description of the invention which follows hereinbelow.


REFERENCES:
patent: 4663190 (1987-05-01), Fujita
patent: 6367150 (2002-04-01), Kirsten
patent: 01245014 (1989-09-01), None
patent: 2000-141084 (2000-05-01), None
Abstract of WO09707541, 2/97.
Abstract of WO09707542, 2/97.
Abstract of JP 2000-141084, May 23, 2002.

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