Liquid crystal display with preventing vertical cross-talk...

Liquid crystal cells – elements and systems – Particular structure – Having significant detail of cell structure only

Reexamination Certificate

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Details

C349S141000, C349S110000

Reexamination Certificate

active

06486933

ABSTRACT:

BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to liquid crystal displays (LCDs) and a manufacturing method thereof, in particular, to structures of liquid crystal displays having pixel electrodes and common electrodes in a substrate and a manufacturing method thereof.
(b) Description of the Related Art
Generally, liquid crystal displays (LCDs) include two substrates facing each other and a liquid crystal layer injected between the substrates. Images of the LCD are displayed by controlling the light transmittance of the liquid crystal layer.
In an LCD mode having pixel electrodes and common electrodes in one substrate, an electric field is generated parallel to the surfaces of the substrates so that long axes of liquid crystal molecules are operated in parallel to the surfaces of the substrates. Therefore, a viewing angle becomes enhanced.
An LCD according to the conventional invention now will be described with reference to the accompanying drawings.
FIG. 1
is a layout view of an LCD according to the conventional invention.
FIG. 2
is a cross sectional view of a thin film transistor taken along line II-II′ in
FIG. 1
, and
FIG. 3
is a cross sectional view taken along line III-III′ in FIG.
1
.
As shown in
FIG. 1
to
FIG. 3
, gate lines
200
are formed on a substrate
100
and arranged in the horizontal direction. The first common electrode line
301
and the second common electrode lines
302
are formed parallel to the gate lines
200
. A plurality of common electrodes
310
are arranged in the vertical direction in
FIG. 1
, extend from the first common electrode line
301
and connect to the second common electrode line
302
.
A gate insulating film
400
covers the gate line
200
, the first and the second electrode lines
301
and
302
, and the common electrodes
310
. An amorphous silicon layer
500
is formed on the gate insulating film
400
and overlaps a portion of the gate line
200
playing a role as the gate electrode. Data lines
700
are formed on the gate insulating film
400
and arranged in the vertical direction in
FIG. 1. A
source electrode
710
is extended from the date line
700
and partially overlaps the amorphous silicon layer
500
, and a drain electrode
720
is formed opposite the source electrode
710
and partially overlaps the amorphous silicon layer
500
. Doped amorphous silicon layers
610
and
620
are formed between the amorphous silicon layer
500
and the source
710
and the drain electrodes
720
to improve contact characteristics.
A pixel electrode line
800
is extended from the drain electrode
720
and overlaps the first common electrode line
301
. A plurality of pixel electrodes
810
is extended from the pixel electrode line
800
and arranged parallel to the data line
700
and the common electrodes
310
. Each the pixel electrode
810
is located between the two common electrodes
310
.
As described above, since the pixel electrode
810
and the common electrodes
310
are formed in the same substrate
100
and parallel to each other, an generated electric field is substantially parallel to the surface of the substrate
100
.
The electric field and an arrangement of the liquid crystal in the LCD according to the conventional invention now will be described hereinafter.
FIG. 4
is a cross sectional view showing the electric field and the arrangement of the liquid crystal molecules.
As shown in
FIG. 4
, a common electrode
310
is formed on the first substrate
100
for a thin film transistor substrate and arranged parallel to a pixel electrode
810
and a data line
700
via a gate insulating film
400
. The second substrate
110
having a light-blocking film
120
corresponds to face the first substrate
100
and a liquid crystal layer (LC) is interposed therebetween. The light-blocking film
120
is located between two pixels, and arranged to face the data line
700
and a portion of the common electrode
310
adjoining the data line
700
The liquid crystal layer (LC) of the above-described LCD is operated by a potential difference between the common electrode
310
and the pixel electrode
810
. In more detail, either a direct-current (DC) voltage or an alternating-current (AC) is applied to the common electrode
310
. Display signals are applied to the pixel electrode
810
through the data line
700
when the thin film transistor (TFT) is in the on-state. If the TFT gets turned off, the signals applied to the pixel electrode
810
are stored until the TFT gets turned on again.
As illustrated in
FIG. 4
, electric field lines E perpendicular to equipotential lines P
eq
are substantially parallel to the surface of the substrates
100
and
110
between the electrodes
310
and
810
. However, an abnormal arrangement of the liquid crystal molecules occurs between the common electrode
310
adjoining to the data line
700
and the pixel electrode
810
. This phenomenon of an unwanted abnormal arrangement is defined as a disclination. One cause of the disclination is the electric voltage differences between the voltages applied and stored to the pixel electrode
810
and voltages applied to the data line
700
. As the electric voltage difference between the data line
700
and the pixel electrode
810
is increased and the distance between the data line
700
and the pixel electrode
810
is narrowed, the disclination region of the liquid crystal layer LC becomes wider. A signal variation of the data line
700
is another cause of the disclination. That is, since the adjoining common electrode
310
is affected by the signal variation, the status of the electric field is changed.
In the disclination region, light-leakage may occur. That is, light tansmitted by the disclination region is partially blocked by the blocking film
120
overlapping the data line
700
and a part of the adjoining common electrode
310
. However, as shown in
FIG. 4
, if the disclination region is wide, the light-leakage still occurs through a region A which is not blocked by the blocking film
120
.
Additionally, even when light passing through the disclination region is initially blocked by the light-blocking film
120
, it is possible that light-leakage still occurs around the light-blocking film
120
. This is because reflection of light occurs at the surface of the blocking film
120
which is made of metals such as Cr and then reflects again off of the common electrode
310
or the pixel electrode
810
.
Since this light-leakage phenomenon occurs at pixels along the data lines
700
, a vertical cross-talk effect by which a white line is generated in a normally black state display screen occurs.
One method to prevent the vertical cross-talk is overlapping a common electrode and the adjoining data line. However, since a parasitic capacitance occurs near the overlapping portion of the data line and the common electrode, the driving IC may be abnormally heated while being operated. Another method to prevent the cross-talk is forming the light-blocking film from an organic film. However, as this would require a different method of recognizing alignment keys, extra equipment investment will be needed.
SUMMARY OF THE INVENTION
The present invention has been made in an effort to solve the above problems.
It is an object of the present invention to reduce the disclination region of liquid crystal layer to decrease cross-talk.
It is another object of the present invention to prevent the cross-talk without generation of heat in driving circuits or an increase of the manufacturing cost due to an equipment investment.
To achieve the above objects, a liquid crystal display according to an embodiment of the present invention provides a field-blocking film which overlaps edges of a data line via an insulating film and blocks an electric field generated from the data line.
The field-blocking webbing may be made by partially overlapping a common electrode adjoining to the data line and connect to the common electrode.
Gate lines may be formed on the same layer as the data line. The gate line is divide

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