Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2005-01-11
2005-01-11
Chow, Dennis-Doon (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S098000, C345S100000, C345S559000
Reexamination Certificate
active
06842162
ABSTRACT:
A new memory controller for use in a display, such as a liquid crystal display of the type comprising a set of first drivers, a set of second drivers, a portion of which can be converted to the first drivers, and a RAM memory structured to accept data at an input and output the data to the sets of first and second drivers when a master clock signal is received at the RAM memory. The memory controller includes a clock signal generator structured to generate the master clock signal; and a control signal generator circuit structured to generate control signals for the RAM memory and the sets of first and second drivers. An important advantage of this memory controller is that it includes a set of auxiliary registers structured to temporarily store a first portion of the data received from the RAM memory after receiving the slave clock cycle, and the set of auxiliary registers structured to output the first portion of data into the portion of the second drivers converted to the set of first drivers after receiving the master clock signal. A method is also disclosed that uses the above structure in order to perform the steps of using a folded memory as a way to increase the utilization rate of memory within the display controller.
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Gariboldi Roberto
Lavorerio Riccardo
Nidasio Giovanni
Sala Leonardo
Chow Dennis-Doon
Jorgenson Lisa K.
Seed IP Law Group PLLC
STMicroelectronics S.r.l.
Tarleton E. Russell
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