Liquid crystal display device and method of fabrication TFT...

Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal

Reexamination Certificate

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C349S106000, C349S138000

Reexamination Certificate

active

06330043

ABSTRACT:

BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a liquid crystal display (LCD) device having an elevated yield and reliability and a method for fabricating a TFT panel included therein.
(b) Description of the Related Art
A conventional LCD described in JP-A-10(1998)-206888 shown in
FIGS. 1 and 2
includes a TFT (thin film transistor) panel
60
and a counter panel
61
. The counter panel
61
includes a transparent dielectric substrate
12
, a transparent counter electrode
22
and a liquid crystal (LC) orientation layer (not shown) disposed on the counter electrode
22
.
The TFT panel
60
includes a transparent dielectric substrate
11
on which a common electrode
24
, scan lines
13
and a gate electrode
13
a
connected thereto are disposed. A gate dielectric film
14
, a semiconductor layer
15
, signal lines
16
, a source electrode
16
a
connected thereto, a drain electrode
16
b
, and a passivation layer
17
are disposed on the common electrode
24
.
A black matrix
18
, a color filter
19
made of photosensitive color resin and an overcoat
20
made of photosensitive transparent resin are disposed on the passivation layer
17
. Through-holes are formed in the color filter
19
and the overcoat
20
.
A transparent pixel electrode
21
connected to the drain electrode
16
b
through the through-hole is disposed on the overcoat
20
.
The TFT panel
60
and the counter panel
61
are disposed so that the respective LC orientation layers not shown are opposed to each other, and an LC layer
23
is interposed between the LC orientation layers.
FIGS. 3A
to
3
D show consecutive steps for fabrication of the LCD of
FIGS. 1 and 2
.
The common electrode
24
, the scan lines
13
and the gate electrode
13
a
are formed on the transparent dielectric substrate
11
by means of patterning as shown in FIG.
2
. After formation of the gate dielectric electrode
14
on the common electrode
24
, the drain electrode
16
b
and the passivation film
17
are formed.
Then, after the color filter
19
is formed on the passivation film
17
as shown in FIG.
3
A and exposed to light by employing a photomask
100
as shown in
FIG. 3B
, etching is conducted as shown in
FIG. 3C
to form the overcoat
20
and the transparent pixel electrode
21
as shown in
FIG. 3E
, thereby forming the TFT panel
60
shown in FIG.
2
.
Then the LCD shown in
FIG. 2
is fabricated by disposing the LC layer
23
between the counter panel
61
and the TFT panel
60
and bonding the TFT panel
60
and the counter panel
61
with each other.
Another conventional LCD described in JP-A-9(1997)-152625 shown in
FIGS. 4 and 5
similarly includes a TFT panel
60
and a counter panel
61
.
The counter panel
61
includes a transparent dielectric substrate
12
, a black matrix
18
, a color filter
19
, a transparent counter electrode
22
and an LC orientation layer (not shown) disposed on the counter electrode
22
.
The TFT panel
60
includes a transparent dielectric substrate
11
on which a common electrode
24
, scan lines
13
and a gate electrode
13
a
connected thereto are disposed. A gate dielectric film
14
, a semiconductor layer
15
, a signal line
16
, a source electrode
16
a
connected thereto, a drain electrode
16
b
, and a passivation layer
17
are disposed on the common electrode
24
.
An interlayer dielectric film
25
made of photosensitive transparent resin is formed on the passivation layer
17
. A transparent pixel electrode
21
connected to the drain electrode
16
b
through a through-hole is disposed on the interlayer dielectric film
25
.
The TFT panel
60
and the counter panel
61
are disposed so that the respective LC orientation layers not shown are opposed to each other, and an LC layer
23
is interposed between the LC orientation layers.
The LCD is fabricated in accordance with the following procedures.
The interlayer dielectric film
25
overlying the transparent dielectric substrate
11
is formed by means of exposure, development and baking by employing the photosensitive transparent resin having a thickness of about 4.5 &mgr;m prepared by its application and pre-baking.
The reason for forming the interlayer dielectric film
25
at the thickness of 4.5 &mgr;m is as follows. When a coupling capacitance between the signal line
16
and the pixel electrode
21
is small, the potential of the pixel electrode
21
is affected by the signal line
16
. The large thickness of the interlayer dielectric film
25
can suppress the potential variation of the pixel electrode
21
.
The amount of the potential variation (&agr;) is expressed as the below equation (1), wherein Cpi-s is the coupling capacitance between the signal line
16
and the pixel electrode
21
, Clc is a capacitance of LCs between the pixel electrode
21
and the counter electrode
11
, and Cstr is an auxiliary capacitance between the pixel electrode
21
and the common electrode
24
.
&agr;=
Cpi
-
s
/(
Cpi
-
s+Clc+Cstr
)  (1)
When the interlayer dielectric layer
25
is formed by employing the resin in this manner, the thicker layer can be obtained more easily than in the case of employing a chemical vapor deposition (CVD) procedure. Accordingly, the interlayer dielectric film
25
is formed as thick as possible to reduce the coupling capacitance while disposing the signal line
16
overlapping with the pixel electrode
21
. Thereby, the area of the black matrix
18
which conceals a region not related with the display is reduced to increase a rate of the effective display area to the pixel area (aperture rate).
Since a position adjustment accuracy of an optical aligner for fabrication a current LCD is about 0.5 &mgr;m, the amount of the overlapping between the signal line
16
and the pixel electrode
21
is required to be about 1 &mgr;m.
When acryl-base resin having a relative dielectric constant of 3 is used as the interlayer dielectric film
25
, the required film thickness thereof is 3 &mgr;m or more for obtaining as small a crosstalk as that of an LCD in which silicon nitride is used as the interlayer dielectric film
25
without overlapping. The layer thickness of about 4.5 &mgr;m is necessary in view of the case wherein the patterned dimensions of the pixel electrode
21
and the signal line
16
are larger than expected.
In JP-A-10(1998)-206888, a material having a negative-photosensitivity group is generally used as the photosensitive color resin. Accordingly, a portion exposed by using the photomask
100
as shown in
FIGS. 3A and 3B
is hardened to form a hardened portion
40
. However, the color resin does not allow the light for exposure to reach to a sufficiently deep portion, and only the surface of the color filter
19
is hardened.
The development under such a situation causes the color filter
19
to have an overhang shown in
FIG. 3C
because the deeper portion is not sufficiently hardened to be easily etched.
If the diameter of the through-hole of the overcoat
20
is larger than that of the color filter
19
when the overcoat
20
is applied and pre-baked on the color filter
19
for the exposure, the development and the baking, the through-hole has such an overhang at the central portion as shown in
FIG. 3D
to worsen the contact between the pixel electrode
21
and the drain electrode
16
b.
In order to prevent this occurrence, the diameter of the through-hole of the overcoat
20
is required to be smaller than that of the color filter
19
as shown in FIG.
3
E. An overlapping margin for exposure must be considered to enlarge the diameter. Accordingly, such a problem is involved that the area of the opening becomes narrower and the rate of the aperture rate becomes lower.
On the other hand, in JP-A-9(1997)-152625, positive photosensitive resin is generally used for forming the interlayer dielectric layer having the through-hole. This is because the removal of a non-exposed portion after the development, which may be generated by, for example, dusts mixed therein when the negative resin is used, can be prevented by emplo

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