Link bus for a hub based computer architecture

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S112000, C710S260000, C710S313000

Reexamination Certificate

active

06901475

ABSTRACT:
A hub based computer system having a central hub that communicates with a plurality of satellite devices over respective link buses. Each link bus is substantially the same and adheres to a predefined link bus protocol. The satellite devices are also connected to industry standard buses/devices and the central hub also communicates with a processor cluster and system memory over respective processor and memory buses. Thus, all components within the system are capable of communicating with each other through the hub. By communicating over the link buses via the link bus protocol, satellite devices can report events to other devices without dedicated wiring/pins between the devices as is currently performed in the prior art. In addition, the flushing of data buffers is governed by the protocol such that only targeted data buffers are flushed, which improves overall system performance.

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