Linewidth metrology of integrated circuit structures

Details Linewidth metrology of integrated circuit structures Linewidth metrology of integrated circuit structures

1997-09-15

1998-09-08

Graybill, David

Semiconductor device manufacturing: process

With measuring or testing

Optical characteristic sensed

2502521, 2504923, 250307, 250311, 382151, G01D 1800, G06K 928

Patent

active

058044604

ABSTRACT:
Illustratively, the present invention includes a method of integrated circuit manufacturing which includes forming a raised topological feature upon a first substrate. A portion of the raised feature is removed, thereby exposing a cross sectional view of the raised feature with the substrate remaining substantially undamaged. The cross sectional view has a critical dimension. The critical dimension of the cross sectional view is measured using a first measuring instrument. Then the critical dimension is measured using a second measuring instrument. The measurements of the first and second measuring instruments are correlated. Then, using the second measuring instrument, raised features via plurality of second substrates are measured.

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