Linear phase detector for high-speed clock and data recovery

Details Linear phase detector for high-speed clock and data recovery Linear phase detector for high-speed clock and data recovery

2006-08-15

2006-08-15

Ha, Dac (Department: 2634)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S354000, C375S371000, C375S373000, C375S226000

Reexamination Certificate

active

07092474

ABSTRACT:
Methods and apparatus for recovering a clock and data from a data signal. A method provides for receiving a clock signal having a first clock frequency and alternating between a first level and a second level, and receiving a data signal having a first data rate, the first data rate equal to the first clock frequency. The method also includes providing a first signal by storing the data signal when the clock signal alternates from the first level to the second level, and providing a second signal by passing the first signal when the clock signal is at the first level, and storing the first signal when the clock signal is at the second level. A third signal is provided by delaying the data signal an amount of time. An error signal is provided by combining the first signal and the third signal, and a reference signal is provided by combining the first signal and the second signal.

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