Linear buffer

Electronic digital logic circuitry – Interface – Logic level shifting

Reexamination Certificate

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Details

C326S062000

Reexamination Certificate

active

07126377

ABSTRACT:
A source-follower transistor based buffer provides high linearity. A replica transistor is used to generate a replica voltage substantially equal to the output voltage of the buffer. The replica voltage is level shifted by a level shift circuit and applied at the drain of the source-follower transistor to improve the linearity of the buffer. The buffer may be used in conjunction with a switched-capacitor sampling circuit. A damping circuit may be used to reduce charge glitches due to sampling. The damping circuit may be a low pass filter. The buffer may be used in an interface circuit that produces an output signal from an input signal and controls the level of the output signal.

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Copy of the International Search Report for International Application No. PCT/US01/28320, issued by the ISA, EP on Nov. 3, 2003, 9 pages.
Patent Abstracts of Japan, vol. 10, No. 150, May 31, 1986, & JP 61 010305 A, Jan. 17, 1986, Abstract.

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