Line width check in layout database

Details Line width check in layout database Line width check in layout database

2006-05-30

2006-05-30

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07055115

ABSTRACT:
A method of performing a design rule check on an integrated circuit includes tagging at least one line in a schematic with a width marker and an associated width parameter, extracting the line width marker and the associated line width parameter, comparing the extracted line width parameter with an actual design width for a design line, and generating an error condition when the actual design line width is less than the line width parameter.

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