Line receiver circuit with line termination impedance

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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Details

C326S021000, C326S086000, C326S083000

Reexamination Certificate

active

06288564

ABSTRACT:

The present invention relates to a line receiver circuit, comprising a buffer section having an input for connection with a transmission line and an output for providing data signals in accordance with signals received through the transmission line, and furthermore comprising termination impedance means connected with the input of said buffer section, for terminating the characteristic impedance of the transmission line.
The transmission of information signals over transmission lines with high speed requires that at the receiving side of the transmission line a termination impedance is provided which matches the characteristic impedance of the transmission line. The matched termination of the line is the more important the higher the band width of the transmitted signals is. In order to keep the design of a line receiver circuit as compact as possible, the termination impedance can be an integral part of this circuit, and can, e.g. be integrated with the remaining sections of the circuit of the same semiconductor chip.
From WO 95/24089 a line receiver circuit of this kind is known which provides for electrical impedance matching at the receiving end of a transmission line. In order to enable this circuit to cooperate with various kinds of transmission lines with different characteristic impedances, the termination impedance means known from this document, comprises a controllable impedance element with an impedance control input for receiving an impedance control signal. Moreover, an impedance control signal generating means is provided, including a twin impedance element having an twin impedance control input and having electrical characteristics in predetermined relation to corresponding electrical characteristics of the termination impedance element. Means are provided for generating a control signal for the twin impedance element such that said twin impedance approximates a target value. The target value can be preset by means of connecting an external reference resistor. The control signal for controlling the impedance of the twin impedance element, is furthermore provided to the termination impedance element, such that due to the corresponding electrical characteristics of the termination impedance element and the twin impedance element, the termination impedance will correspond to the twin impedance.
In this document the controllable impedance elements are MOS field effect transistors, with the gate acting as the impedance control input. With such semiconductor impedance elements, the following disadvantage arises when the circuit has to cope with a larger range of different operating voltages.
In order to allow the circuit to operate properly at the lower end of the supply voltage range, the impedance elements must have a certain minimum channel width determined by the required lowest adjustable impedance. If the supply voltage of this circuit rises, the control circuitry will generate the impedance control signal such that the impedance element substantially maintains its impedance. The large width of the impedance element in turn results in that the impedance control voltage will not rise to the same extent as the supply voltage, but will remain low. This in turn implies that the twin impedance element, and accordingly the termination impedance element no longer behaves like an impedance but rather, behaves like a current source which will not optimally terminate the transmission line. Moreover, in this current source mode, the twin impedance element and the termination impedance element will be more sensitive to variations or noise on the control signal which is a serious problem especially for circuits with a comparatively large size in a digital signal environment.
Accordingly, it is the object of the present invention to provide an improved line receiver circuit that can operate over a large operating voltage range, with the termination impedance means and the twin impedance means behaving substantially like impedances over the entire operating voltage range.
According to the present invention, this object is solved as defined in claim
1
.
A line receiver circuit according to the present invention comprises a plurality of twin impedance elements which are connected together to provide the twin impedance. Each of the twin impedance elements receives an individual impedance control signal from the impedance control signal generating means. Also the termination impedance means comprises a plurality of termination impedance elements, each element having an individual impedance control input. The impedance control signal generating means includes means for providing a respective control signal for each of said termination impedance elements in a predetermined relation to the control signal for the respectively corresponding twin impedance element.
By means of providing an individual control signal to each of the impedance elements in the twin impedance means and deriving control signals for the termination impedance elements from these twin impedance control signals, the line receiver circuit according to the present invention can provide a termination impedance over a large range of power supply voltages.
The term “twin impedance element” indicates that electrical characteristics of this element are in a predetermined proportion to corresponding electrical characteristics of the associated termination impedance element. As an example, integrated semiconductor technology allows that within the same manufacturing process, different components, e.g. two transistors, are created which have substantially identical electrical characteristics, as is as such well known in the art.
Advantageous embodiments of the present invention are given in the dependent claims.
Preferably, For high supply voltages at least one of the impedance control signals will be such that the associated controllable impedance element is in a high impedance state, e.g. switched off, while other impedance elements are active, depending on the set target impedance value. With the supply voltage decreasing, the impedance control signals are generated such that the lower the supply voltage, the larger is the number of impedance elements which leave the high impedance state and turn active.
Preferably, the impedance elements are semiconductor components, and preferably MOSFETs or bipolar transistors. The means for generating respective control signals for each of the twin impedance elements such that the impedance of said twin impedance approximates a target value, preferably operates to inactivate as many impedance elements as possible for meeting the target impedance value. The control of each of the impedance elements can be embodied by means of providing individual control loops for each twin impedance element, the control loops being dependent from each other. Preferably, a further one of the control loops abruptly or gradually inactivates its associated impedance element as soon as the control loop or loops previously active, have reached a state where a deviation of the overall twin impedance from the target impedance value becomes too large, e.g. larger than a preset threshold. The remaining active impedance elements are respectively driven to maintain an active state of low impedance or saturation, where the differential impedance quite well approximates the absolute impedance. In this way, a satisfactorily linear behaviour of the impedance means is achieved.
Preferably, the twin impedance elements are connected in parallel to constitute the twin impedance means.
The means for generating respective control signals for each of said twin impedance elements can comprise a plurality of operational amplifiers each connected to detect a deviation of the overall twin impedance of the twin impedance means from the target value, and to control an associated one of the twin impedance elements. The operational amplifiers have different offset voltages such that with the supply voltage increasing, a sequential inactivation of the individual impedance elements can be achieved.
According to another embodiment

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