Line memory

Static information storage and retrieval – Read/write circuit – Sipo/piso

Patent

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Details

365220, 365221, G11C 700

Patent

active

055089674

ABSTRACT:
A serial/parallel converter has a function of forwarding data of remainder bits of p in number (e.g., 3) less than the serial/parallel number, which are positioned at the end of serial data, from the head from latches to p parallel output terminals via selectors. Accordingly, parallel data in which the data of remainder bit number are arranged correctly can be serially developed even though a simple delay amount is an arbitrary bit width. Thus, contemplated is a line memory of simple delay type which can set the simple delay amount to an arbitrary bit width, while performing serial/parallel conversion.

REFERENCES:
patent: 4288864 (1981-09-01), Harroun et al.
patent: 4775990 (1988-10-01), Kamuro et al.
patent: 4945518 (1990-07-01), Muramatsu et al.

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