Line layout structure of semiconductor memory device

Details Line layout structure of semiconductor memory device Line layout structure of semiconductor memory device

2005-11-17

2008-10-14

Dang, Phuc T (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Fet configuration adapted for use as static memory cell

C257S296000, C257S909000, C257S390000, C257S758000, C365S051000, C365S063000, C365S230030

Reexamination Certificate

active

07436078

ABSTRACT:
An apparatus including a trolling motor having at least one operational subsystem and the trolling motor also having an integral electronic controller for controlling the operational subsystem wherein the improvement comprises an integral electronic diagnostic system which will receive diagnostic information from the operational subsystem and will transmit the diagnostic information for reception externally of the trolling motor.

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patent: 2005/0286285 (2005-12-01), Lee et al.
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