Line edge roughness reduction by plasma treatment before etch

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

Reexamination Certificate

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C430S328000, C430S317000, C430S318000, C430S030000, C427S569000, C427S570000

Reexamination Certificate

active

06811956

ABSTRACT:

TECHNICAL FIELD
The present invention generally relates to processing a semiconductor substrate. In particular, the present invention relates to mitigating line-edge roughness along sidewalls of structures formed on a semiconductor substrate.
BACKGROUND ART
Achieving the objectives of miniaturization and higher packing densities continue to drive the semiconductor manufacturing industry toward improving semiconductor processing in every aspect of the fabrication process. Several factors and variables are involved in the fabrication process. For example, at least one and typically more than one photolithography process may be employed during the fabrication of a semiconductor device. Each factor and variable implemented during fabrication must be considered and improved in order to achieve the higher packing densities and smaller, more precisely formed semiconductor structures.
In general, lithography refers to processes for pattern transfer between various media. It is a technique used for integrated circuit fabrication in which a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the photoresist, and an exposing source (such as optical light, X-rays, or an electron beam) illuminates selected areas of the surface through an intervening master template, the photoresist mask, for a particular pattern. The lithographic coating is generally a radiation-sensitized coating suitable for receiving a projected image of the subject pattern. Once the image is projected, it is indelibly formed in the coating. The projected image may be either a negative or a positive of the subject pattern. Exposure of the coating through the photoresist mask causes a chemical transformation in the exposed areas of the coating thereby making the image area either more or less soluble (depending on the coating) in a particular solvent developer. The more soluble areas are removed in the developing process to leave the pattern image in the coating as less soluble polymer. The resulting pattern image in the coating, or layer, may be at least one portion of a semiconductor device that contributes to the overall structure and function of the device.
Because the photoresist is used to form features on the semiconductor devices, the integrity of the photoresist must be maintained throughout the lithography process. That is, any flaw or structural defect which is present on a patterned photoresist may be indelibly transferred to underlying layers during a subsequent etch process wherein the photoresist is employed.
One example of an undesirable structural defect is line-edge roughness (LER). LER refers to the variations on the sidewalls of features which may originate from LER in the patterned photoresist. LER in photoresists can be caused by various factors such as LER on chrome patterns residing on the reticle, image contrast in a system for generating the photoresist pattern, a plasma etch process which can be used to pattern the photoresist, natural properties and/or weaknesses of the photoresist materials, and the photoresist processing method.
In addition, LER appearing in fabricated structures can occur as a result of damage to the patterned photoresist during an etch process, as illustrated in a partially fabricated semiconductor structure
10
in Prior Art FIG.
1
. The semiconductor structure
10
includes a silicon substrate
20
, a dielectric layer
30
, and a photoresist layer
40
formed over the dielectric layer
30
. As shown, plasma etchants employed to bombard exposed portions of the dielectric layer
30
through a patterned photoresist
40
inevitably attack the relatively soft photoresist material
50
. In addition to removing exposed portions of the metalized layer, the energetic and reactive plasma species may alter the properties of the photoresist material, thus leading to LER
60
in the photoresist. The plasma effects can be more serious for 193 nm photoresists, which have less etch resistance than resists used at higher wavelengths such as 248 nm, 365 nm, etc. The condition may even worsen for wavelengths below 193 nm, such as 157 nm photoresists.
Moreover, as feature size decreases, line-edge roughness can interfere with accurate metrology and adversely affect device performance.
SUMMARY OF THE INVENTION
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended to neither identify key or critical elements of the invention nor delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides a novel monitoring system and method for enhancing consistency in photoresist material, thereby mitigating the occurrence of LER in photoresists. More specifically, the present invention provides a method to strengthen short wavelength photoresist films (e.g., 157 nm and 193 nm photoresists) before the short wavelength photoresist is used to etch exposed portions of an underlying dielectric layer. For example, after a short wavelength photoresist layer has been patterned with 193 nm or lower radiation, the patterned photoresist is exposed to and treated with a plasma under process conditions which are chosen to strengthen the photoresist rather than to etch the photoresist or any other layer exposed to the plasma treatment. This is accomplished in part by utilizing a plasma including at least one of helium (He), hydrogen (H
2
) and argon (Ar), or a combination thereof.
In particular, an image, which may correspond to any of a number of semiconductor structures (e.g., damascene trench, conductive line, gate, contact, and the like), is patterned onto a short wavelength photoresist using 193 nm or lower radiation. The layers of material beneath the photoresist are not etched during the patterning of the photoresist. After the short wavelength photoresist has been patterned, the patterned photoresist may be treated with a plasma in order to strengthen the photoresist without adversely affecting or etching any layer exposed to the plasma. Strengthening the photoresist before it is employed to etch portions of exposed, underlying layer mitigates the occurrence of line edge roughness (LER) in the photoresist, thereby mitigating mal-formed features in the underlying layer.
One aspect of the present invention relates to a method for mitigating LER. The method involves providing a semiconductor substrate having at least one dielectric layer formed thereon. A photoresist layer having a thickness from about 500 angstroms to about 5000 angstroms may be formed over the dielectric layer. An image can be patterned on the photoresist layer using short wavelength radiation, thereby exposing portions of the dielectric layer. Short wavelength radiation specifically includes about 193 nm light and about 157 nm light or less. The image may, for example, correspond to one or more trenches. After the photoresist has been patterned and before the exposed portions of the dielectric layer are etched through openings of the photoresist, the photoresist is exposed to a plasma selective to the patterned photoresist layer to strengthen the photoresist layer without substantially etching the exposed dielectric layer. The plasma may comprise at least one of helium, hydrogen and argon, or a combination thereof. Once treated, the exposed portions of the dielectric layer can be etched through the openings of the treated photoresist layer with an etchant selective to the dielectric layer. As a result of the plasma treatment, the treated photoresist layer is substantially resistant to the etching effects of the etchant, thereby mitigating the occurrence of LER in the photoresist.
Another aspect of the present invention relates to a method for mitigating the occurrence of LER during fabrication of a semiconductor device. The method involves forming a short wavelength photoresist layer over one or more di

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