Line driver for transmitting data

Details Line driver for transmitting data Line driver for transmitting data

2007-05-01

2007-05-01

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S086000, C327S052000, C327S065000, C327S112000

Reexamination Certificate

active

10485336

ABSTRACT:
A line driver (3) for transmitting data with high bit rates, in particular for wire-bound data transmission in the full-duplex process, comprises a differential pair with differential pair transistors (14, 15) for generating transmission impulses as a function of the data to be transmitted, whereby the transmission impulses are preferably output via cascode transistors (16, 17), each with the differential pair transistors (14, 15) forming a cascode circuit, onto the data transmission line (8, 9) connected to the line driver (3). For reproducing the behaviour of the differential pair a replica differential pair with replica differential pair transistors (18, 19) is provided, generating replica impulses corresponding to the transmission impulses, which replica impulses can be fed via replica cascode transistors (20, 21) to a hybrid integrated circuit (6) for effecting echo compensation in relation to impulses received via the data transmission line (8, 9)

REFERENCES:
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patent: 5999044 (1999-12-01), Wohlfarth et al.
patent: 6304106 (2001-10-01), Cecchi et al.
patent: 6437599 (2002-08-01), Groen
patent: 6498511 (2002-12-01), Tamura et al.
patent: WO 03/009475 (2003-01-01), None
Mahadevan, Rajeevan et al., “A Differential 160 MHz Self-Terminating Adaptive CMOS Line Driver”, IEEE Journal of Solid-State Circuits, vol. 35, No. 12, Dec. 2000, pp. 1889-1894, (6 pages).
Roessler, Bernward et al., “CMOS Analog Front End of a Transceiver with Digital Echo Cancellation for ISDN”, IEEE Journal of Solid-State Circuits, vol. 23, No. 2, Apr. 1988, pp. 311-317, (7 pages).
Shoval, Ayal, et al., “WA 18.7 A Combined 10/125Mbaud Twisted-Pair Line Driver with Programmable Performance/Power Features”, IEEE International Solid-State Circuit Conference, 2000, pp. 314-315, (2 pgs), no month.

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