Electric lamp and discharge devices: systems – Cathode ray tube circuits – Cathode-ray deflections circuits
Reexamination Certificate
2001-01-11
2002-05-07
Vu, David (Department: 2821)
Electric lamp and discharge devices: systems
Cathode ray tube circuits
Cathode-ray deflections circuits
C315S387000
Reexamination Certificate
active
06384547
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a line deflection circuit comprising a switching transistor, a collector of said switching transistor being connected to a supply voltage via at least a primary winding of a transformer, said transformer having a secondary winding which is provided with a first and with a second secondary connection, which first secondary connection is connected to a base of a second switching transistor in a grounded emitter circuit.
Such line deflection circuits are known. When the line deflection circuit is in operation, major currents flow through the second switching transistor. These major currents are to be switched off at regular intervals, i.e. at each line which is written on a picture screen. Switching off of the major current through the second switching transistor takes place in that the voltage at the base of the second switching transistor is made zero or even negative, and the current entering the base is made equal to zero. If the current entering the base of the transistor is greater than what corresponds to the hfe of the relevant switching transistor while a major current is being passed, it will cost more time than is absolutely necessary to reduce the base current to zero on account of the large quantity of charge carriers present in the base. On the other hand, if the current passed into the base is too small, the collector-emitter voltage remaining across the second switching transistor remains so great that, in conjunction with the high value of the current, a considerable amount of heat is dissipated in the second switching transistor, so that the latter is liable to heat up quickly and may become defective.
The use of bipolar transistors for switching inductive loads, such as a line deflection coil in a TV set or monitor, has the advantage that these bipolar transistors can withstand high collector-emitter voltages but can also carry strong currents without extreme losses and at a low manufacturing cost. A disadvantage of this type of bipolar transistors, however, is the low hfe value, as well as the tolerances on the hfe. As was described above, switching off of such a bipolar transistor requires particular attention.
The above means for appliances which are to be manufactured in series production, such as a TV set or a monitor, that a solution is to be found which takes into account all tolerances which may occur in a line deflection circuit. Such tolerances are found in the hfe, in the values of the components in the control circuit for the base current, in the temperature dependence of said components, and in the frequency dependence of said components. The result of all these tolerances is that in general a design for a line deflection circuit results in a circuit which ensures an optimum switching of the second switching transistor (i.e. with minimum dissipation) in a small proportion of any production series only, whereas in all other units of this same production series the second switching transistor has to dissipate too much heat, either because of conduction losses in the case of underloading or because of switching losses in the case of overloading. This shortens the useful life of the second switching transistor and detracts from the reliability of the line deflection circuit.
SUMMARY
It is an object of the invention to provide a line deflection circuit in which the losses of the second switching transistor, both conduction and switching losses, are kept as low as possible.
According to the invention, this object is achieved in that an inductive reactance is present between the first secondary connection and the base of the second switching transistor, in that a resistor and a DC voltage decoupling capacitor are provided in series between on the one hand a first junction point of the inductive reactance and the base of the second switching transistor and on the other hand a second junction point of the emitter of the second switching transistor and the second secondary connection, in that an input of a peak voltage detection device is connected to the first junction point, in that an input of a control circuit is connected to an output of the peak voltage detection device, in that an output of the control circuit is connected to a voltage-controlled current source, and in that the voltage-controlled current source is connected in series with the primary winding of the transformer between the collector of the first switching transistor and the supply voltage.
It is achieved thereby that, the moment the second switching transistor is switched off, a maximum negative current will flow in the base which rises very quickly to zero and which sees as its load an LCR circuit comprising the inductive reactance, the resistor, and the parasitic capacitance between the base and the emitter of the second switching transistor. The very quick rise to zero of the negative current will generate a peak voltage as a result of the presence of the LCR circuit, the amplitude of said voltage being dependent on the steepness of the positive flank of the current in the base of the second switching transistor. The steeper said positive flank, the higher the peak voltage. The value of the peak voltage is detected by the peak voltage detection device and is used as an input signal for the control circuit. The control circuit controls the voltage-controlled current source on the basis of the value of the peak voltage such that the peak voltage, which is dependent inter alia on the value of the current passed by the current source through the primary winding of the transformer, increases or does not decrease. The value of the peak voltage is a maximum in the situation in which the second switching transistor is optimally adjusted and operates with minimum dissipation.
A preferred embodiment of the invention is characterized in that the control circuit comprises a programmed programmable device.
A further preferred embodiment of the invention is characterized in that the programmed programmable device is programmed so as to change the current through the voltage-controlled current source in steps each time and to detect upon each stepwise change of the current in a first direction in which direction a peak value of the voltage at the first junction point detected by the peak voltage detection device changes as a result of said stepwise change of the current, and so as to effect a further stepwise change in the current through the voltage-controlled current source in the first direction or in an opposite direction in dependence on the detected direction of the change in the peak value.
It is achieved thereby that the control circuit ensures a minimum level of the dissipation of the second switching transistor both in the case of underloading of the second switching transistor (increased dissipation during conduction) and in the case of overloading of the second switching transistor (high dissipation peak during switching off).
REFERENCES:
patent: 4634938 (1987-01-01), Haferl
Biren Steven R.
U.S. Philips Corporation
Vu David
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