Lightly doped polycrystalline silicon resistor having a non-nega

Details Lightly doped polycrystalline silicon resistor having a non-nega Lightly doped polycrystalline silicon resistor having a non-nega

1992-02-05

1993-08-31

Wilczewski, Mary

Metal treatment

Barrier layer stock material, p-n type

With recess, void, dislocation, grain boundaries or channel...

337 7, H01C 706, H01C 702

Patent

active

052405117

ABSTRACT:
A method of fabricating polycrystalline silicon resistors having nearly zero or positive temperature coefficient includes the steps of depositing a layer of polycrystalline silicon, implanting the layer with silicon to make the layer substantially amorphous, introducing an impurity to dope the layer, and annealing the layer.

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