Lightly doped MISFET with reduced latchup and punchthrough

Details Lightly doped MISFET with reduced latchup and punchthrough Lightly doped MISFET with reduced latchup and punchthrough

1991-01-03

1993-05-04

Jackson, Jr., Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257399, 257349, H01L 2978

Patent

active

052084736

ABSTRACT:
A method for preparing a MISFET of a minute size with the channel length of not more than 2 .mu.m between a source and a drain, comprises the steps of forming a mask for exposing a region for forming a well on a planar surface of a semiconductor substrate, and introducing ions at a predetermined energy into the well region by using the mask. The predetermined energy is such as to form a peak of the impurity concentration distribution at a position deeper than the bottom surface of the source and the drain and to maintain the layer of at least a partial layer of the channel at an impurity concentration lower than 10 .sup.16 cm.sup.-3 so that a high speed carrier movement in the channel is provided without causing a punch-through phenomenon.

REFERENCES:
patent: 3789504 (1974-02-01), Jaddam
patent: 4354307 (1982-10-01), Vinson et al.
patent: 4734382 (1988-03-01), Krishna
patent: 4799098 (1989-01-01), Ikeda et al.

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