Light receiving device with built-in circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S291000, C257S446000, C257S463000

Reexamination Certificate

active

06433374

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a light receiving device with a built-in circuit including a light receiving element (photodiode) for converting light incident thereon into an electric signal and a signal processing circuit, including at least a MOS transistor, for processing a signal output from the light receiving element, the light receiving element and the signal processing circuit being provided on a single substrate. The present invention specifically relates to a light receiving device with a built-in circuit for increasing the response speed of the light receiving element and suppressing malfunction of the MOS transistor.
2. Description of the Related Art
Conventionally, semiconductor devices such as light receiving devices with a built-in circuit, are used in the fields of, for example, optical pickups, optical fibers and photocouplers. Due to the recent increase in the operating speed of CD-ROM, CD-R/RW and DVD-ROM drives and the like, optical pickups now require a high performance light receiving element with a built-in circuit having superior characteristics including high sensitivity, low noise and high response speed. Optical fibers also require a high performance light receiving element with a built-in circuit in order to deal with the increased speed of data transfer.
FIG. 10
shows an exemplary light receiving device with a built-in circuit
900
including a light receiving element and a signal processing circuit provided on a single substrate. The light receiving device with a built-in circuit
900
is described in Japanese Laid-Open Publication No. 11-251567.
The light receiving device with a built-in circuit
900
shown in
FIG. 10
includes a P-type semiconductor substrate
30
, an N
+
-type buried diffused layer
31
laminated on the entirety of a surface of the P-type semiconductor substrate
30
, and an N

-type epitaxial layer
32
laminated on the N
+
-type buried diffused layer
31
. The light receiving device with a built-in circuit
900
includes a peripheral circuit
21
as a signal processing circuit and a photodiode
20
as a light receiving element. The peripheral circuit
21
and the photodiode
20
are partially provided in an upper portion of the N

-type epitaxial layer
32
. The peripheral circuit
21
includes MOS transistors
36
and
37
, and the photodiode
20
is provide adjacent to the peripheral circuit
21
. The photodiode
20
includes, for example, a light receiving area including a P
+
-type region
33
and N type regions
34
, and N
+
-type diffused regions
35
.
The light receiving device with a built-in element
900
having the structure shown in
FIG. 10
functions as follows. The N
+
-type buried diffused layer
31
and N
+
-type diffused regions
35
together form a potential barrier surrounding the photodiode
20
. The potential barrier prevents stray carriers generated in channel regions of the MOS transistors
36
and
37
of the peripheral circuit
21
from entering the photodiode
20
, and thus reduces fixed pattern noise (FPN).
The light receiving device with a built-in element
900
having the structure shown in
FIG. 10
also functions as follows. Since the N
+
-type buried diffused layer
31
has a conductivity type which is opposite to the conductivity type of the P-type semiconductor substrate
30
and the photodiode
20
is provided on the N
+
-type buried diffused layer
31
, a P-N junction region is generated at an interface between the P-type semiconductor substrate
30
and the N
+
-type buried diffused layer
31
. The P-N junction region prevents stray carriers generated in the channel regions of the MOS transistors
36
and
37
of the peripheral circuit
21
from entering the photodiode
20
, and thus reduces fixed pattern noise.
In developing a light receiving device with a built-in circuit handling signals having a very low amplitude, it is important to prevent stray carriers generated in the MOS transistors
36
and
37
from entering the photodiode
20
and also to prevent stray carriers generated in the photodiode
20
from entering the MOS transistors
36
and
37
and thus generating a wrong signal. Especially in the structure of having the MOS transistors
36
and
37
in the signal processing circuit, an electric current formed of optical carriers generated in the photodiode
20
are likely to flow into the channel regions of the MOS transistors
36
and
37
. Therefore, even when the electric current formed of the optical carriers has a very small magnitude, there is an undesirable possibility of the light receiving device malfunctioning.
The light receiving device with a built-in circuit
900
having the above-described structure includes the following problems.
In general, by a usual MOS process, MOS transistors are formed in a P-type semiconductor substrate having a low specific resistance, in order to prevent a latch-up phenomenon which is caused by a parasitic operation between the MOS transistors by stabilizing the entire surface of the P-type semiconductor substrate at the GND potential.
Conversely, the light receiving device with a built-in circuit
900
shown in
FIG. 10
includes the N
+
-type buried diffused layer
31
provided on the entire surface of the P-type semiconductor substrate
30
. Therefore, the P-type semiconductor substrate
30
, which needs to be stabilized at the GND potential, is electrically separated from the N

-type epitaxial layer
32
in which the MOS transistors
36
and
37
are formed. The N

-type epitaxial layer
32
is significantly thinner and thus has a higher specific resistance than the P-type semiconductor substrate
30
. Therefore, the N

-type epitaxial layer
32
has a significantly high resistance in a lateral direction, which is parallel to a surface of the N

-type epitaxial layer
32
. In such a structure, a latch-up phenomenon is very likely to occur. When the latch-up phenomenon occurs, the electric current continues to flow in the chip until the high supply voltage is turned off. As a result, the peripheral circuit
21
does not operate normally. When the electric current continues to flow by the high supply voltage, the temperature of the chip may possibly become abnormally high.
As described above, the N
+
-type diffused regions
35
provided so as to surround a light receiving region of the photodiode
20
are in contact with the N
+
-type buried diffused layer
31
, and therefore prevent stray carriers generated in the MOS transistors
36
and
37
from entering the photodiode
20
. The N
+
-type diffused regions
35
extend from the surface of the N

-type epitaxial layer
32
to an interface between the N

-type epitaxial layer
32
and the N
+
-type buried diffused layer
31
. In order to extend the N
+
-type diffused regions
35
to the N
+
-type buried diffused layer
31
, the thickness of the N-type epitaxial layer
32
is about 5 &mgr;m at most due to the diffusion coefficient of the carriers with respect to the N
+
-type diffused regions
35
. In such a case, a diffusion current component formed by optical carriers which are generated in the vicinity of the P-N junction region at an interface between the P-type semiconductor substrate
30
and the N
+
-type buried diffused layer
31
exerts the strongest influence on the response speed of the photodiode
20
. Since the optical carriers are recombined with the holes by the P-N junction of the P-type semiconductor substrate
30
and the N
+
-type buried diffused layer
31
, the response speed of the photodiode
20
can be increased.
However, optical carriers which are generated by the light incident on the photodiode
20
are mostly generated in a lower portion of the N
+
-type buried diffused layer
31
. Such optical carriers do not contribute to form a photocurrent, which significantly reduces the photoelectric conversion efficiency of the photodiode
20
. For example, i

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