Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1983-06-27
1986-08-19
Lawrence, Evan K.
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
204192S, 204192EC, 204192E, 204192N, 252404, 427259, 427264, 430917, 524291, 560 75, B05D 306, B05D 500, C23C 1404
Patent
active
046069313
ABSTRACT:
A lift-off process for depositing a metallurgy layer on a substrate wherein the improvement is the use of a sacrificial masking layer that is substantially unaffected by exposure to high intensity radiation. The process includes the steps of (1) preparing a resin mixture of a polyaryl sulfone polymer, and a compound of the following: ##STR1## wherein R.sub.1 is a methyl ethyl or an .alpha. branched alkyl group from 3 to 10 atoms, R.sub.2 is a hydrogen, methyl, ethyl or a branched alkyl group of from 3 to 10 carbon atoms, and X has a value of 1 to 6, and Z is an aliphatic hydrocarbon of the formula C.sub.5 H.sub.8 the compound being present in the amount of from 0.5 to 3.5% by weight of the polyaryl sulfone resin, (2) depositing a blanket sacrificial masking layer of the resin mixture on the surface of the semiconductor wafer, (3) selectively removing areas of the blanket masking layer to define the image of the desired metallurgy pattern, (4) depositing a blanket layer of conductive metal, and (5) exposing the resultant coated wafer to a solvent for the polyaryl sulfone resin to remove the masking layer in all the overlying metal areas.
REFERENCES:
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patent: 4346125 (1982-08-01), Kinsbron et al.
Fredericks et al., Polysulfone Lift-Off Masking Technique, IBM Technical Disclosure Bulletin, 20(3), p. 989, Aug. 1977.
Olsen Beverly L.
Ouano Augustus C.
International Business Machines - Corporation
Lawrence Evan K.
Stoffel Wolmar J.
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