Lifetime measurement of an ultra-thin dielectric layer

Details Lifetime measurement of an ultra-thin dielectric layer Lifetime measurement of an ultra-thin dielectric layer

1999-09-09

2001-06-19

Karlsen, Ernest (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S765010, C324S520000

Reexamination Certificate

active

06249139

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a lifetime measurement of a semiconductor device, and more particularly, to a lifetime measurement of an ultra-thin dielectric layer.
2. Description of the Related Art
When the requirements for the integration of the integrated circuit increase, the requirements for an ultra-thin dielectric layer with low leakage current also increases. Generally, a dielectric layer having a thickness less than 50 Å is called an ultra-thin dielectric layer. At such a thickness, the test of the reliability of the ultra-thin dielectric layer plays an important role in quality control.
Generally, the reliability of a dielectric layer can be obtained by performing a time-dependent dielectric breakdown (TDDB) test under a constant voltage stress (CVS). The applied stress voltage is far greater than the device's operating voltage. As shown in
FIG. 1
, in the TDDB test, the current increases with the stress time, and after a period, the current dramatically increases. The phenomenon is called hard breakdown (HBD).
In fact, in the TDDB test for an ultra-thin dielectric layer, the soft breakdown (SBD) and the stress-induced leakage current (SILC) are also observed as shown in FIG.
2
. Furthermore, in the traditional TDDB test, the quality of the SILC curve is generally poor, and the SBD curve is not remarkable. However, if the SBD and the SILC are not taken into account, the reliability of an ultra-thin dielectric layer is easily overestimated. As a result, the ultra-thin dielectric quality cannot be efficiently estimated.
In Microelectronic and Reliability (1998, pp37-72), A. Martin et al. have mentioned that the SBD and the SILC of the ultra-thin dielectric layer may be more easily monitored at a lower stress voltage. However, they did not point out a preferred stress voltage for monitoring the SBD and the SILC.
SUMMARY OF THE INVENTION
According to above, the invention provides a lifetime measurement of an ultra-thin dielectric layer. The measurement applies to a substrate having a gate oxide layer and a gate. The substrate is coupled with a ground. A stress-and-measurement cycle is performed to detect a gate current. The cycle comprises the following steps. The gate is subjected to a first constant stress voltage. When the measurement of the gate current is performed, the gate is subjected to a second constant stress voltage in which the voltage is about one half of the first constant stress voltage. The high-voltage stress (i.e. the first constant stress voltage) and the low-voltage stress (i.e. the second constant stress voltage) are repeated until the SBD is detected.
According to the invention, the stress-induced leakage stress and the soft breakdown can be easily measured, and the lifetime of the ultra-thin dielectric layer can be obtained accordingly. Thus, the invention provides an efficient measurement method for lifetime estimation of ultra-thin dielectrics with SILC and SBD being taken into account.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5804975 (1998-09-01), Alers et al.
patent: 6043662 (2000-03-01), Alers et al.
Dielectric Reliability Measurement Methods: A Review, Andreas Martin, Paula O'Sullivan, and Alan Mathewson, 1998, Published in Microelectronics and Reliability, vol. 38, No.1.
New Experimental Findings on SILC and Soft Breakdown of Ultra-Thin Gate Oxides, M.G. Chen, C.H. Liu, M.T. Lee, and K.Y. Fu.

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