Lid for semiconductor package and package having the lid

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

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Details

428637, 428645, H01L 2100

Patent

active

054143004

ABSTRACT:
In a ceramic lid for sealing a semiconductor device mount portion of a ceramic package substrate having a semiconductor device mounted thereon, a seal layer disposed in an outer peripheral edge portion of a lid is formed by a solder comprising 2 to 15 wt % of Bi, 2.0 to 6.0 wt % of Sn, 0.5 to 2.0 wt % of In, 0.5 to 2.0 wt % of Ag and the balance of Pb, through an Ag--Pt system underlying metallized layer. A semiconductor package comprising a semiconductor package substrate and a lid is sealed by the lid.

REFERENCES:
patent: 4356047 (1982-10-01), Gordon et al.
patent: 4487638 (1984-12-01), Hoge
patent: 4746583 (1988-05-01), Falanga
patent: 4833102 (1989-05-01), Bryne et al.

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