Lid and method of employing a lid on an integrated circuit

Details Lid and method of employing a lid on an integrated circuit Lid and method of employing a lid on an integrated circuit

2005-09-30

2008-09-30

Andújar, Leonardo (Department: 2826)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C257S684000, C257S704000, C257S710000, C438S106000

Reexamination Certificate

active

07429501

ABSTRACT:
A lid having a plurality of recesses at the edges of the lid to provide an improved adhesive bond between the lid and a substrate of an integrated circuit is disclosed. The plurality of recesses may be a castellation comprising a collection of semi-circular cuts into the originally straight edges of the lid. The castellation can be formed by stamping, etching, molding design, or milling/drilling, all of which are well-known methods in the art of forming lids for integrated circuits. The castellation can be vertically straight or it can be slightly tapered, to provide a better locking of the lid on to the package. Epoxy in the recesses can provide an epoxy post for locking the lid. Method of forming a lid having a plurality of recesses and employing a lid on an integrated circuit are also disclosed.

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Wu, Paul Ying-Fang et al., “Integrated Circuit Package and Method of Attaching a Lid to a Substrate of an Integrated Circuit”, U.S. Appl. No. 11/250,943, filed Oct. 14, 2005, 21 pages, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.

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