Level translator

Details Level translator Level translator

2005-12-27

2005-12-27

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Interface

Supply voltage level shifting

C326S083000, C326S113000, C326S034000

Reexamination Certificate

active

06980032

ABSTRACT:
An input level translator circuit is provided. The translator circuit is configured to convert a full-range signal into a low-range signal and a high-range signal. A first pass transistor is configured to restrict the voltage of the full-range signal to provide a high-range voltage at a high-range node when the full-range signal corresponds to a logic 0. A second pass transistor is configured to restrict the voltage of the full-range signal to provide a low-range voltage at a low-range node when the full-range signal corresponds to a logic 1. A first switch circuit is configured to couple the high-range to a first cascode bias signal when the full-range voltage corresponds to a logic 1. A second switch circuit is configured to couple the low-range node to a second cascode bias signal when the full-range voltage corresponds to a logic 0.

REFERENCES:
patent: 5465054 (1995-11-01), Erhart
patent: 5604449 (1997-02-01), Erhart et al.
patent: 6031395 (2000-02-01), Choi et al.
patent: 6392440 (2002-05-01), Nebel

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