Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate
2008-07-08
2008-07-08
Le, Don (Department: 2819)
Electronic digital logic circuitry
Interface
Logic level shifting
C326S083000
Reexamination Certificate
active
11341611
ABSTRACT:
A P-channel MOS transistor and an N-channel MOS transistor are respectively controlled by a first control signal and a second control signal. The first control signal CTL1and the second control signal CTL2are independent from each other. The second control signal CTL2is generated by a NOR circuit2to which a data signal DATA and a third control signal CTL3are inputted. A load capacitor C1which samples the first electric potential or the GND electric potential is configured by a gate capacitance of another MOS transistor.
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Le Don
Sharp Kabushiki Kaisha
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