Electronic digital logic circuitry – Interface – Logic level shifting
Patent
1994-12-27
1997-08-19
Westin, Edward P.
Electronic digital logic circuitry
Interface
Logic level shifting
326 81, 326 83, H03K 190185, H03K 190948
Patent
active
056592582
ABSTRACT:
There is provided a level shifter circuit which operates such that when the potential of the input signal changes from the ground potential to the first power source potential, the third transistor turns to be ON, and the fifth transistor turns to be OFF. On this instance, since the potential of the output signal is higher than the first power source potential, the second electrode of the first transistor is initiated to be charged up through the third and the fourth transistors. After that, the potential of the output signal falls down when the eighth transistor turns to be ON state. Since the potential of the second electrode of the first transistor has been charged up, the second transistor quickly turns to be OFF state so that the rush current is reduced flown from the second power source potential to the ground potential. When the potential of the output signal drops down enough, the fourth transistor turns to be OFF state so that the rush current flown from the second power source potential to the first power source potential is prevented.
REFERENCES:
patent: 4318015 (1982-03-01), Schade, Jr.
patent: 5144162 (1992-09-01), Tran
patent: 5321324 (1994-06-01), Hardee et al.
patent: 5444396 (1995-08-01), Soneda
K. Komatsuzaki et al, "Circuit Techniques For a Wide Word I/O Path 64 Meg DRAM", VSLI Synposium 91, pp. 133-134.
Anantha Chandrakasan et al, "A Lower Power Chipset for Portable Multimedia Applications", 1994 IEEE International Solid-State Circuits Conference, pp. 82-83.
Tanabe Tetsuya
Tanaka Yasuhiro
Tanoi Satoru
OKI Electric Industry Co., Ltd.
Santamauro Jon
Westin Edward P.
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