Level shifter circuit

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit

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Details

36523006, 365185, 326 62, G11C 700

Patent

active

054503574

ABSTRACT:
A level shifter circuit 150 for selecting different voltage levels for programming memory cells 10 is provided. The level shifter 150 has an input 152 connected to a control circuitry and an output 154 connected to memory cells 10. The level shifter 150 is connected to two voltage sources: a high voltage source 166 and a low voltage source 164. The level shifter 150 has an isolation transistor 156 to buffer the input control circuitry from the higher voltage in the level shifter 150. Depending on the input control signal, either a first switching transistor 158 will select the low voltage source 164 for output or a second switching transistor 162 will select the high voltage source 166 for output. A pull-up transistor 162 is used to maintain the state of the switching transistors 158, 160 when the voltage sources 164, 166 ramp up. A voltage limiting transistor 170 reduces the voltage potential (breakdown voltage) across the drain and source terminals of the pull-up transistor 162.

REFERENCES:
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patent: 4642798 (1987-02-01), Rao
patent: 5031149 (1991-07-01), Matsumoto et al.
patent: 5132565 (1992-07-01), Kuzumoto
patent: 5157281 (1992-10-01), Santin et al.
patent: 5187683 (1993-02-01), Gill et al.
patent: 5202855 (1993-04-01), Morton
patent: 5319604 (1994-06-01), Imondi et al.

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