Level shifter

Details Level shifter Level shifter

2000-03-30

2004-10-26

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

With means to increase breakdown voltage threshold

With electric field controlling semiconductor layer having a...

C257S358000, C257S492000

Reexamination Certificate

active

06809393

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a level shifter used for controlling and for driving power devices. More specifically, the present invention relates to a level shifter formed on a semiconductor substrate.
BACKGROUND
The requirements for the electric power converters, such as inverters which use power switching devices, include low electric power consumption, high performances, small size, low costs, low noise and such requirements. In the field of power modules developed by combining an insulated gate bipolar transistor (IGBT) and a free wheel diode (FWD), intelligent power modules (IPM's) have been used widely. The IPM incorporates a microcomputer, that mounts intelligent functions, e.g. for detecting and protecting against overcurrent and overheat and that programs the operations of the inverter, and an interface component for the power module. As a result, down-sizing of the inverters has progressed. However, since the IPM now incorporates the detector circuit and the protection circuit, that used to be configured outside the power module, in the power module, the number of the constituent parts, and the size and the manufacturing costs of the IPM are increased.
To obviate the problems described above, a driver IC with a high breakdown voltage (high-breakdown-voltage driver IC), that mounts the driver functions of the upper and lower arms of an inverter and various protection functions on one or more silicon chips, has been proposed. This IC has a structure that facilitates sustaining a high voltage of 600 V or 1200 V, that is the breakdown voltage of the IGBT. The high-breakdown-voltage driver IC includes a circuit, the reference potential thereof is the ground potential or a low potential close to the ground potential, and a circuit, the reference potential thereof is a high potential corresponding to the DC intermediate potential of the inverter. Therefore, it is necessary for the high-breakdown-voltage driver IC to include a level shifter with a high breakdown voltage (high-breakdown-voltage level shifter) for transmitting signals between the circuits.
FIG. 10
is a cross sectional view showing the structure of a conventional N-channel level shifter. Referring now to
FIG. 10
, an N-channel level shifter is formed on a substrate. The N-channel level shifter includes an N
−
-type region
105
formed in the surface portion of a P
−
-type substrate
106
for separating a high-breakdown-voltage portion by a reverse bias voltage across the PN-junction. The N-channel level shifter employs a double reduced surface electric field structure (double RESURF structure), including P
−
-type substrate
106
and based on the principle of reduced surface electric field (RESURF), for relaxing the electric field around the curbed portion of the PN-junction. This structure of the N-channel level shifter raises the breakdown voltage closely to the breakdown voltage of the junction between P- and N-type parallel plates.
Sources
102
b
and
102
c
are formed in the surface portion of N-type region
105
, that is connected electrically to a drain
104
a
, and a gate
102
a
is arranged above sources
102
b
and
102
c
such that an NMOSFET with a high breakdown voltage is constructed. Pinch resistance
103
with a high breakdown voltage is created in N
−
-type region
105
. Drain
104
a
works as a lead out terminal on the high potential side of pinch resistance
103
. Drain
104
a
is connected electrically to a level shift resistor
101
arranged above N-type region
105
.
In
FIG. 10
, level shift resistor
101
is on the same substrate on which the NMOSFET is formed. Alternatively, a double chip configuration may be employed that mounts level shift resistor
101
on another chip and connects level shift resistor
101
electrically to drain
104
a
by wiring.
FIG. 11
is a cross sectional view showing the structure of a conventional P-channel level shifter. The conventional P-channel level shifter employs a double RESURF structure in the same way as in the conventional N-channel level shifter of FIG.
10
. Referring now to
FIG. 11
, a PMOSFET with a high breakdown voltage includes N-type regions
114
and
118
in the surface portion of a P-type substrate
1116
, a drain
111
b
in the surface portion of N-type region
118
, a P
−
-type region
119
in the surface portion of N
−
-type region
118
and connected to drain
111
b
, a source
111
c
in the surface portion of N
−
-type region
118
, and a gate
111
a
above N
−
-type region
118
. A level shift resistor
112
is arranged above N
−
-type region
114
. Level shift resistor
112
is connected electrically to drain
111
b
by a wire
120
b
. High-breakdown-voltage pinch resistance
113
is created in P
−
-type region
119
. Alternatively, level shift resistor
112
is formed on another chip as in the alternative of FIG.
10
and connected electrically to the MOSFET by wire bonding.
The conventional level shifters are not so reliable. A high bias voltage applied to the MOSFET under the high temperature and high humidity conditions lowers the threshold value of the MOSFET, that further lowers the breakdown voltage of the level shifter.
In view of the foregoing, it is an object of the invention to provide a level shifter that facilitates reducing high-bias-voltage application to the MOSFET and, thereby, improving the reliability thereof.
SUMMARY OF THE INVENTION
According to an aspect of the present invention, there is provided a level shifter, formed on a semiconductor substrate, for controlling and driving a power device, the level shifter including: a level shift resistor connected electrically to an intermediate potential circuit; a pinch resistance region exhibiting a high breakdown voltage, the pinch resistance region being connected electrically to the level shift resistor; and a field effect transistor region connected electrically to the pinch resistance region, the field effect transistor region being in a location not in contact with the level shift resistor nor with the pinch resistance region.
A high bias voltage is prevented from being applied to the field effect transistor region by connecting electrically the level shift resistor to the intermediate potential circuit, by connecting electrically the pinch resistance region to the level shift resistor, by connecting electrically the field effect transistor region to the pinch resistance region, and by positioning the field effect transistor region in a location not in contact with the level shift resistor nor with the pinch resistance region.


REFERENCES:
patent: 3885998 (1975-05-01), Reindl
patent: 4760434 (1988-07-01), Tsuzuki et al.
patent: 5801418 (1998-09-01), Ranjan
patent: 5917341 (1999-06-01), Suder et al.
patent: 6087899 (2000-07-01), Kubota
patent: 6096591 (2000-08-01), Gardner et al.
patent: 404208517 (1992-07-01), None
patent: 9-55498 (1997-02-01), None
Carter, D.R.H. et al, “An integrated level shifter for use in high frequency half-bridges” in “New Deleopments in Power Semiuconductor Devices”, IEE Colloquium on—(Digest #1996/046), pp. 9/1-9/8, Jun. 21, 1996.

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