Level shift semiconductor device

Electronic digital logic circuitry – Interface – Supply voltage level shifting

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Details

326 68, 326 80, H03K 190185

Patent

active

057421838

ABSTRACT:
A level shift semiconductor device converts a signal level into another level between circuits connected to each other having different supply voltages. An input signal is supplied to the source of a first MOS transistor of a first-conductivity type (NMOS). The drain of the 1st NMOS transistor is connected to the input terminal of an inverter. An output signal is outputted via the output terminal of the inverter. The drain and gate of a first MOS transistor of a second-conductivity type (PMOS) are connected to the input and output terminals of the inverter, respectively. The gate and source of a second NMOS transistor are connected to the output terminal of the inverter and the gate of the 1st NMOS transistor, respectively. The gate and source of a second PMOS transistor are connected to the gate and source of the 2nd NMOS transistor. A first supply voltage is supplied to the drain of the 2nd PMOS transistor. And, a second supply voltage is supplied to the inverter, the source of the 1st PMOS transistor, and the drain of the 2nd NMOS transistor. The second voltage is larger in absolute value than the first voltage.

REFERENCES:
patent: 4574273 (1986-03-01), Atsumi et al.
patent: 4656373 (1987-04-01), Plus
patent: 4926070 (1990-05-01), Tanaka et al.
patent: 4958091 (1990-09-01), Roberts
patent: 5115434 (1992-05-01), Aizaki
patent: 5416368 (1995-05-01), Sugibayashi
patent: 5666070 (1997-09-01), Merritt et al.

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