Level shift circuit formed by two cascaded CMOS inverters

Electronic digital logic circuitry – Interface – Supply voltage level shifting

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

326 68, 326 83, H03K 190175

Patent

active

059429151

ABSTRACT:
In a level shift circuit including cascaded first and second CMOS inverters, the first CMOS inverter is powered by a first power supply voltage and a second power supply voltage lower than the first power supply voltage. Also, the second CMOS inverter is powered by the first power supply voltage and a third power supply voltage lower than the first power supply voltage. An input voltage supplied to the first CMOS inverter has a high level lower than the first power supply voltage and a low level higher than the second power supply voltage.

REFERENCES:
patent: 4028556 (1977-06-01), Cachier et al.
patent: 4092548 (1978-05-01), Beilstein, Jr. et al.
patent: 4191898 (1980-03-01), Ulmer
patent: 5089862 (1992-02-01), Warner, Jr.et al.
patent: 5323071 (1994-06-01), Hirayama
patent: 5332934 (1994-07-01), Hashimoto et al.
patent: 5463330 (1995-10-01), Tsuchida
patent: 5666070 (1997-09-01), Merritt et al.
patent: 5705940 (1998-01-01), Newman et al.
patent: 5821559 (1998-10-01), Yamazaki et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Level shift circuit formed by two cascaded CMOS inverters does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Level shift circuit formed by two cascaded CMOS inverters, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Level shift circuit formed by two cascaded CMOS inverters will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-470069

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.