Level shift circuit

Electronic digital logic circuitry – Interface – Logic level shifting

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Details

326 80, H03K 190175

Patent

active

060345497

ABSTRACT:
A level shift circuit consisting MOSFETs is provided which comprises at least two bias voltage supply circuits and a driver circuit cascaded between input and output terminals of the level shift circuit. The first stage of the bias voltage supply circuits receives an input voltage and the last stage thereof supplies a level-shifted voltage to the driver circuit. The driver circuit includes N- and P-channel transistors. Gates of the transistors of the driver circuit receive the level-shifted voltage from the bias voltage supply circuits and the input voltage, respectively. Sources of the transistors of the driver circuit are commonly connected to the output terminal to provide an output voltage.

REFERENCES:
patent: 4150308 (1979-04-01), Adlhoch
patent: 4626704 (1986-12-01), Takata et al.
patent: 4642488 (1987-02-01), Parker
patent: 4675557 (1987-06-01), Huntington
patent: 4724343 (1988-02-01), Le Roux et al.
patent: 5206544 (1993-04-01), Chen et al.
patent: 5381060 (1995-01-01), Ainspan et al.

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