Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate
2008-06-17
2008-06-17
Chang, Daniel D (Department: 2819)
Electronic digital logic circuitry
Interface
Logic level shifting
C326S081000, C327S333000
Reexamination Certificate
active
07388402
ABSTRACT:
A level shift circuit is used to receive a low-voltage signal to generate a corresponding high-voltage signal. The circuit has a first transistor of a first type, a second transistor of a second type, a third transistor of the second type and a fourth transistor of the second type. The first transistor has a gate receiving the low-voltage signal and a source receiving a first supply voltage. The second transistor has a source receiving a second supply voltage and a drain coupled to a drain of the first transistor. The third transistor has a source receiving the second supply voltage, a drain outputting the high-voltage signal and a gate coupled to a gate of the second transistor. The fourth transistor has a source and a gate commonly coupled to receive a third supply voltage, and a drain coupled to the drain of the third transistor.
REFERENCES:
patent: 5286985 (1994-02-01), Taddiken
patent: 6111430 (2000-08-01), Kuchta et al.
Bu Lin-Kai
Chiou Yu-Wen
Chang Daniel D
Himax Technologies Limited
Patterson & Sheridan L.L.P.
LandOfFree
Level shift circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Level shift circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Level shift circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2811096