Level shift circuit

Details Level shift circuit Level shift circuit

2011-05-31

2011-05-31

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Interface

Logic level shifting

C326S081000, C326S063000, C327S333000, C327S108000

Reexamination Certificate

active

07952389

ABSTRACT:
A level shift circuit insusceptible to mistaken operations at the time of disengagement of a standby state is disclosed. The level shift circuit includes a level converter circuit5, a barrier gate circuit2and a holding circuit (MMP1, MMP2). The level converter circuit converts a signal level of a circuit operating in a VDD1system to a signal level of a VDD2system. The barrier gate circuit is responsive to a standby signal (STBY) to fix input signals (AB, AAB) of the level converter circuit5at a LOW level. The holding circuit holds an output of the level converter circuit5at a constant voltage when the input signals (AB, AAB) are at the LOW level (FIG.1).

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