Level converting circuit for converting level of an input signal

Details Level converting circuit for converting level of an input signal Level converting circuit for converting level of an input signal

1996-07-03

1998-12-01

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

36523001, 365226, G11C 1300

Patent

active

058447679

ABSTRACT:
The level converting circuit includes a first current cutting circuit, a second current cutting circuit, a level shift circuit and an inverter. The first current cutting circuit includes two PMOS transistors connected to a node having a boosted potential Vpp. The second current cutting circuit includes two NMOS transistor connected to a ground node. The level shift circuits include two PMOS transistors and two NMOS transistors. Before a through current flows between the node having the boosted potential Vpp and the ground node, any of the transistor included in the first current cutting circuit and any of the transistors included in the second current cutting circuits are turned off. Therefore, through current between the node having the boosted potential Vbb and the ground node can be prevented.

REFERENCES:
patent: 5193073 (1993-03-01), Bhuva
"An Efficient Back-Bias Generator with Hybrid Pumping Circuit for 1.5V DRAM's," by Yasuhiko Tsukikawa et al., Mitsubishi Electric Corporation, Itami, Japan.

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